tzhouam
5d81c3678b
Audit Qualcomm components and Windows TTS sustained drift
2026-09-24 09:12:11 +08:00
tzhouam
d8995de9ec
Record official InternVLA dataset access gate
2026-09-24 08:49:40 +08:00
tzhouam
bc168a3ee2
Audit SA talker CPU and NPU vocoder failure
2026-09-24 08:43:27 +08:00
tzhouam
6af714cf9b
Track SA8775P InternVLA Cosmos encoder artifact
2026-09-24 08:37:15 +08:00
tzhouam
11c1a56467
Profile mobile MiniCPM and InternVLA NPU components
2026-09-24 08:32:04 +08:00
tzhouam
3b4469a136
Record X Elite CPU talker parity and RB3 fallback
2026-09-24 08:26:45 +08:00
tzhouam
855dd31f07
Track RB3 speech fallback and X Elite Cosmos export
2026-09-24 08:23:03 +08:00
tzhouam
afd3f8c716
Record X Elite MiniCPM speech head inference
2026-09-24 08:18:41 +08:00
tzhouam
e5aaf3186c
Record SA speech head and X Elite QNN vocoder results
2026-09-24 08:16:15 +08:00
tzhouam
76941854b1
Record SA8775P QNN vocoder compile and inference
2026-09-24 08:11:27 +08:00
tzhouam
4d6124f320
Record SA8775P CPU vocoder placement and timing
2026-09-24 08:06:23 +08:00
tzhouam
f04fdf79da
Track CPU talker controls and mobile speech-head profiles
2026-09-24 08:01:05 +08:00
tzhouam
d71d39f656
Audit mobile speech heads and S25 VLA latent impact
2026-09-24 07:56:17 +08:00
tzhouam
1949c31f80
Advance Qualcomm TTS and InternVLA component qualification
2026-09-24 07:32:21 +08:00
tzhouam
ea373e3cbf
Audit X Elite CPU vocoder and isolate TFLite conversion parity
2026-09-24 07:16:15 +08:00
tzhouam
e4a4477929
Update device-model matrix with Qualcomm TTS component evidence
2026-09-24 07:04:24 +08:00
tzhouam
152d67ab86
Audit Qualcomm Qwen3-TTS vocoder parity and profile
2026-09-24 06:48:14 +08:00
tzhouam
bd39e903e1
Profile Spark attention across Qualcomm edge devices
2026-09-24 06:11:15 +08:00
tzhouam
c5f47b22fd
Profile repeated Radeon MiniCPM-o requests and record memory regression
2026-09-24 03:09:21 +08:00
tzhouam
5dd5d70671
Profile native Windows Radeon InternVLA policy stage
2026-09-24 02:24:16 +08:00
tzhouam
752357d318
Profile native Windows CPU InternVLA through Omni
2026-09-24 02:05:26 +08:00
tzhouam
48646da78e
Add admitted InternVLA policy stages and update device matrix
2026-09-24 01:42:41 +08:00
tzhouam
9df5ac8836
Run InternVLA synthetic policy with Radeon Cosmos handoff
2026-09-24 01:12:27 +08:00
tzhouam
b796c787ec
Profile InternVLA Cosmos encoder on Radeon 890M and update matrix
2026-09-24 00:51:17 +08:00
tzhouam
e6ea35ca12
Qualify scoped WSL CPU Qwen3-TTS Omni complete requests
2026-09-24 00:41:14 +08:00
tzhouam
10ae2818c7
Profile MiniCPM-o GGUF Omni complete path on WSL CPU
2026-09-24 00:21:11 +08:00
tzhouam
fa5aadca6f
Record MiniCPM-o GGUF Omni desktop qualification depth
2026-09-23 23:02:10 +08:00
tzhouam
13cc723c71
Qualify scoped MiniCPM-o Radeon hybrid path
2026-09-23 22:43:20 +08:00
tzhouam
445ca92ef1
Record MiniCPM-o CPU GGUF complete-path evidence
2026-09-23 22:22:54 +08:00
tzhouam
bb8735effc
Add native Windows CPU Qwen TTS Omni stage and profile evidence
2026-09-23 21:18:21 +08:00
tzhouam
8569995591
Add bounded Omni Qwen3-TTS CPU Radeon whole-session stage
2026-09-23 20:52:43 +08:00
tzhouam
34beb7f01e
Add bounded Omni llama.cpp Spark text stage for Windows CPU and Radeon
2026-09-23 20:30:28 +08:00
tzhouam
4fee1dbe39
Profile Qwen3-TTS hybrid Radeon and CPU route
2026-09-23 19:59:04 +08:00
tzhouam
54c086acae
Record native Windows CPU Qwen3-TTS scoped E2E evidence
2026-09-23 19:19:13 +08:00
tzhouam
03d6cb9a93
Qualify standalone Spark text on Windows CPU and Radeon 890M
2026-09-23 18:57:41 +08:00
tzhouam
34295f3eb3
Qualify Spark output-head component on AMD NPU and update E2E matrix
2026-09-23 18:32:13 +08:00
tzhouam
10221f0665
Qualify scoped MiniCPM-o image and audio paths on WSL CPU
2026-09-23 17:44:02 +08:00
tzhouam
b29a6ca99f
Document Windows MiniCPM-o image and audio end-to-end runs
2026-09-23 17:29:13 +08:00
tzhouam
a8fdb1babf
Validate MiniCPM-o audio input to speech on WSL GPU
2026-09-23 17:09:37 +08:00
tzhouam
0d00ba4701
Validate MiniCPM-o image to speech on WSL GPU
2026-09-23 17:03:31 +08:00
tzhouam
8a4559c46c
Validate MiniCPM-o speech pipeline on native Windows GPU
2026-09-23 16:54:17 +08:00
tzhouam
2f5d0edcf7
Qualify scoped MiniCPM-o CPU speech and Windows InternVLA policy paths
2026-09-23 16:21:28 +08:00
tzhouam
c0deaa76ba
Repair MiniCPM-o and InternVLA scoped E2E paths
2026-09-23 15:15:07 +08:00
tzhouam
b039b6a5bd
Enable scoped Qwen3.8 Omni inference and CPU TTS compatibility
2026-09-23 10:01:21 +08:00
tzhouam
75b65f859b
Add local E2E profiling evidence and support roadmap
2026-09-22 19:25:02 +08:00
tzhouam
ab2f2a3d65
Audit all mobile and PC model pairings with archived evidence
2026-09-22 13:54:34 +08:00
tzhouam
1887d8294b
Present support as mobile and PC by model matrix
2026-09-22 13:31:08 +08:00
tzhouam
5c75d5bb0a
Document support as model and PC configuration pairings
2026-09-22 13:20:50 +08:00
tzhouam
723c550209
Integrate portable edge graph backends with Omni runtime
...
Extract versioned stage contracts, model shared CPU/iGPU/NPU memory constraints, and add explicit graph routes, reservations, output acknowledgements, and worker retirement. Fix native Windows shared-buffer lifetime and host paths. Document qualified hardware paths and remaining rollout gates.
2026-09-22 13:12:33 +08:00
tzhouam and Claude Fable 5.1
33de5d8629
Merge vLLM-Omni v0.29.0rc1 into edge-infer/omni-0.29.0
...
The pair for vLLM v0.29.0: rc1's docs pin vllm==0.29.0 and a static scan of
rc1's vllm.* imports against the v0.29.0 tree finds nothing missing, while
our 0.28-based tree needs seven modules v0.29.0 no longer has
(vllm.inputs.preprocess, entrypoints.launcher, openai.cli_args,
openai.engine.protocol, serve.utils.server_utils, layers.batch_invariant,
models.hunyuan_v1).
Ten files conflicted. Upstream's structure is the base everywhere; the
fork's features are re-attached to it:
- deploy_profile / apply_deploy_profile run before rc1's resolve_omni_config
pops deploy_config (async_omni_engine, cli/serve); the deploy-profile
selector and the resolve_model_config_path chain it needs stay in
entrypoints/utils.py; stage_overrides takes rc1's dict type.
- config_factory keeps the lazy diffusion output-type import; the diffusion
registry import in rc1's new config/resolver.py is made lazy for the same
WP6 reason (TTS path must not load diffusion).
- requirements: our core/media split kept; rc1's transformers>=5.13 floor
and kernels==0.16.1 applied in core.txt / media.txt.
- TTS: rc1's split_granularity and bounded seed plus our output_mode=
codec_tokens, _SessionInbox cancel handling and codec DELTA accumulation;
our private _conditioning_cache_salt is superseded by rc1's public
tts_adapters/base.py::conditioning_cache_salt.
- stage_runtime: rc1's single ExitStack G2 path (lock released before READY)
replaces our two-path block, with the four worker_phase names the init
profiler consumes still emitted; _cpu_placed / host admission kept.
Not yet run against vLLM 0.29.0: the tests listed in the W6 record.
Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com >
2026-09-18 09:57:20 +08:00