Qualify scoped MiniCPM-o CPU speech and Windows InternVLA policy paths
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@@ -13,6 +13,15 @@ three-stage text-to-speech functional pass after correcting request embeddings,
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and an InternVLA real-weight synthetic action forward. Model-quality and device gates
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remain open; the 2026-09-22 audit remains the historical baseline.
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The [WSL CPU expansion](../../benchmarks/edge_harness/results/e2e_expansion_20260923/README.md)
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adds constrained three-stage MiniCPM-o text-to-speech requests and a CPU-only
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InternVLA synthetic policy forward. A subsequent 20-request serial MiniCPM-o
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profile measured p50 21.86 s/p95 22.97 s request wall time after one warmup, with
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swap use under the 30.91 GiB WSL limit. It does not qualify speech quality,
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concurrency, streaming, loading peak or sustained behavior. Native Windows
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InternVLA direct-policy runs separately passed on CPU and RTX 5090 Laptop with
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synthetic inputs; AMD and mobile cells do not inherit these passes.
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## Architecture and prerequisites
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Keep Omni's PipelineConfig, StageRuntime, StageClient, orchestration and admission
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@@ -68,8 +77,8 @@ capability and lifecycle implementation; a state-handle type alone is insufficie
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| M1 | S25 Spark | Device-local Omni-compatible controller; embedding, prefill, continuous decode, ring/full KV, head and sampler; resident state | Reference checks, at least 128 output tokens, 512-window/1024-bucket transitions, cancellation, resident memory and sustained profile |
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| M2 | Qwen3-TTS | Resolve desktop playback and shutdown findings and CPU compatibility; then mobile talker/predictor plus GPU vocoder | Complete PCM and tail, history/chunk correctness, interruption/recovery, quality checks, no post-startup underruns and RTF below 1 in the declared workload |
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| M3 | AMD stages | Connect compatible real encoders or other useful coarse stages through current Omni workers; start from the existing 890M vision evidence | Actual node/device placement, numerical and task quality, complete downstream output, shared-memory and handoff costs; reject unhelpful splits |
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| M4a | MiniCPM-o 4.5 | Three-stage desktop text+WAV path produced coherent text and nonzero WAV under a constrained 24 GiB profile after fixing uninitialized request embeddings; add encoder and persistent-state reference before mobile artifacts | Speech intelligibility/alignment, separate text, image and audio-understanding suites, then combined streaming and interruption |
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| M4b | InternVLA-A1 | Real weights, observation preprocessing, shared prefix state, iterative action head and versioned action metadata; one strict-load synthetic action forward now passes on RTX 5090 Laptop | Reference action agreement on real observations, units/order/timestamps, observation age, stale-input handling and application-specific deadline reporting |
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| M4a | MiniCPM-o 4.5 | Three-stage desktop text+WAV produced coherent text and nonzero WAV on RTX 5090 Laptop and WSL CPU under separate constrained plans. The CPU plan needed vLLM 0.28/0.29 processor compatibility and used swap; 20 serial CPU requests measured p50 21.86 s/p95 22.97 s. Add encoder and persistent-state reference before mobile artifacts | Speech intelligibility/alignment, CPU loading-peak admission, concurrency, separate text, image and audio-understanding suites, then combined streaming and interruption |
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| M4b | InternVLA-A1 | Real weights, observation preprocessing, shared prefix state, iterative action head and versioned action metadata; strict-load synthetic policy forwards now pass on WSL and native Windows, each on CPU and RTX 5090 Laptop | Reference action agreement on real observations, units/order/timestamps, observation age, stale-input handling and application-specific deadline reporting |
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| Independent | Qwen3.8-27B | Public Omni pipeline binding; text, then image/video and longer contexts; same-model CPU/iGPU artifact and explicit offload evaluation | Modality-specific quality, actual loading/runtime memory and measured performance; each precision/context receives its own qualification |
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The initial M0 desktop text acceptance remains scoped to its tested checkpoint,
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