Add local E2E profiling evidence and support roadmap

docs/design/omni_edge_backends.md

@@ -38,6 +38,17 @@ non-migratable. Legacy M0 defaults are explicitly preserved in `contracts.legacy
 
 ## Hardware composition
 
+The [E2E support roadmap](omni_edge_e2e_roadmap.md) maps every configuration to
+implementation work packages, model-specific acceptance gates and a common
+profiling protocol, including explicit artifact/capacity rejection outcomes.
+
+The [end-to-end profiling follow-up](../../benchmarks/edge_harness/results/e2e_profiling_20260922/README.md)
+checks the same 60 pairs and profiles five executable desktop paths with 20
+requests per length/concurrency group and 30-minute sustained runs. It retains
+explicit blockers for the other 55 cells. Performance completion is separate
+from release qualification: TTS playback/sustained real-time failures, quality,
+memory-accounting and unavailable-device gaps remain documented repair items.
+
 ### Mobile and PC × model support matrix
 
 **All 60 named pairings were checked on 2026-09-22** through actual runs,

docs/design/omni_edge_e2e_roadmap.md

@@ -0,0 +1,154 @@
+# Local PC/mobile end-to-end support and profiling roadmap
+
+This plan covers the [60 named device/model pairings](../../benchmarks/edge_harness/results/model_device_matrix_20260922/README.md).
+Each pairing must finish with either a qualified local pipeline or a documented
+feasibility/implementation blocker. It does not promise that every model fits
+every device. The [current profiling review](../../benchmarks/edge_harness/results/e2e_profiling_20260922/README.md)
+records measured execution separately from release qualification.
+
+## Architecture and prerequisites
+
+Keep Omni's PipelineConfig, StageRuntime, StageClient, orchestration and admission
+as the control plane. Keep vLLM's model execution, caches and internal batching.
+Other runtimes implement stage backends. Model adapters own preprocessing,
+sampling, modality alignment, state semantics and output interpretation.
+
+The portable boundary is request/events, tensor or buffer contracts, opaque
+state handles, device capabilities, artifact manifests and execution plans.
+Persistent weights, KV/ring/recurrent state and workspaces stay with the backend.
+Prefer one backend per autoregressive session; split coarse stages only after
+measuring a complete-chain benefit.
+
+Android may use a small native controller derived from Omni's stage, session and
+streaming semantics, constrained by the same contract tests. A full Python/vLLM
+service port is not a prerequisite. AI Hub remains a validation facility rather
+than a deployment dependency.
+
+Before advancing individual cells:
+
+1. Pin installed runtime builds and checkpoint revisions. Repair the CPU
+   vLLM/Omni mismatch and native Windows CPU attention-operator gap independently.
+2. Obtain complete MiniCPM-o 4.5 and InternVLA-A1 artifacts; another model with a
+   similar name is not a substitute. Record export, quantization, calibration,
+   compiler, shape buckets, state layout and quality evidence.
+3. Integrate native and external stages into the shared admission ledger.
+   CPU/iGPU/NPU share physical RAM; Windows availability and WSL quota are
+   separate constraints on that RAM. Budget loading peaks, weights, state,
+   activations, workspace, transfers and safety margin. Discrete VRAM is separate.
+4. Require bounded queues, consumer acknowledgement, cancellation propagation,
+   sequence/epoch fencing, state retirement and actual placement reporting.
+   No silent precision/model/context changes or CPU fallback labelled as NPU.
+5. Record exact SKU/RAM, OS, drivers, installed packages, power state and device
+   access. A local mobile application needs full on-device execution access;
+   AI Hub component jobs alone do not establish that access or an E2E pipeline.
+
+Implementation ownership follows the existing source boundaries:
+[portable contracts](../../packages/omni-stage-contracts/omni_stage_contracts),
+[host routes and process lifetime](../../vllm_omni/host),
+[StageClient](../../vllm_omni/engine/stage_client.py) and
+[backend adapters](../../vllm_omni/engine/backends),
+[StageRuntime](../../vllm_omni/engine/stage_runtime.py), and the
+[resource ledger](../../vllm_omni/engine/resource_ledger.py).
+The current `GraphStageClient` represents one bounded, non-preemptible graph
+call. Persistent mobile sessions require an explicitly negotiated backend
+capability and lifecycle implementation; a state-handle type alone is insufficient.
+
+## Work packages and completion gates
+
+| Order | Work package | Implementation | Gate before wider rollout |
+|---|---|---|---|
+| Foundation | Runtime, contracts and accounting | Close the prerequisites above; reuse the existing qualification runners | Reproducible launch or explicit pre-load refusal, correct state ownership and placement, auditable memory budget |
+| M1 | S25 Spark | Device-local Omni-compatible controller; embedding, prefill, continuous decode, ring/full KV, head and sampler; resident state | Reference checks, at least 128 output tokens, 512-window/1024-bucket transitions, cancellation, resident memory and sustained profile |
+| M2 | Qwen3-TTS | Resolve desktop playback and shutdown findings and CPU compatibility; then mobile talker/predictor plus GPU vocoder | Complete PCM and tail, history/chunk correctness, interruption/recovery, quality checks, no post-startup underruns and RTF below 1 in the declared workload |
+| M3 | AMD stages | Connect compatible real encoders or other useful coarse stages through current Omni workers; start from the existing 890M vision evidence | Actual node/device placement, numerical and task quality, complete downstream output, shared-memory and handoff costs; reject unhelpful splits |
+| M4a | MiniCPM-o 4.5 | Desktop reference for encoders, thinker, speech head, flow/HiFT and persistent state; then target-specific mobile artifacts | Separate text, image, audio-understanding and speech-generation suites, then combined streaming and interruption |
+| M4b | InternVLA-A1 | Real weights, observation preprocessing, shared prefix state, iterative action head and versioned action metadata | Reference action agreement, units/order/timestamps, observation age, stale-input handling and application-specific deadline reporting |
+| Independent | Qwen3.8-27B | Public Omni pipeline binding; text, then image/video and longer contexts; same-model CPU/iGPU artifact and explicit offload evaluation | Modality-specific quality, actual loading/runtime memory and measured performance; each precision/context receives its own qualification |
+
+The initial M0 desktop text acceptance remains scoped to its tested checkpoint,
+precision and workload. New concurrency, state-boundary or quality evidence is
+required before broadening that acceptance. Current batch-dependent greedy
+outputs need reference analysis; timing alone cannot identify their cause.
+
+VLA qualification here ends at action data. Physical robot control, collision
+avoidance and actuator safety belong to the external controller.
+
+## Hardware routes
+
+Every row below covers all five model families through the work packages above.
+Specific artifact/backend feasibility is a gate, not assumed from the route.
+
+| Execution configuration | Route to qualify | Main additional gate |
+|---|---|---|
+| CPU only, WSL | Compatible vLLM CPU; a model-specific external CPU backend where required | ISA, complete model operations, artifact format and total RAM |
+| CPU only, native Windows | Native CPU worker implementing the same contracts | Executable attention/state operations and matching model adapter; CUDA success does not cover this row |
+| CPU + NVIDIA, WSL | Complete-model reference using vLLM/Omni CUDA | Full modalities and quality, stable power conditions, loading and sustained memory |
+| CPU + NVIDIA, native Windows | Native installation of the same declared pipeline | IPC/process lifetime, filesystem/startup scope, streaming and shutdown validated separately |
+| CPU + Radeon 890M | Compatible whole-model backend or CPU model plus coarse iGPU stages | Full downstream model result and transfers, not only an encoder result |
+| CPU + AMD NPU | CPU model plus compiled NPU stages | Accepted artifact, actual NPU placement, quality and net E2E contribution |
+| CPU+iGPU+NPU, with/without NVIDIA | Select stage placements after establishing individual routes | Co-resident memory/power; identical-workload single-backend versus split-serial versus split-overlapped comparison |
+| Snapdragon X Elite PC | Windows ARM controller and target-specific CPU/GPU/QNN stages | Full application access, Windows ARM artifacts and RAM; Android binaries are not interchangeable |
+| Galaxy S25 | Spark first, TTS second; memory-qualified MiniCPM-o/VLA afterward | Complete device-local state/streaming loop and sustained measurements |
+| Galaxy S24 | Rebuild and revalidate the selected mobile pipeline | Independent SoC/runtime/quality qualification; S25 results do not transfer |
+| SA8775P ADP | Target-local controller and compatible compiled stages | Complete application access, parity, memory and sustained co-residency |
+| RB3 Gen 2 / QCS6490 | Supported integer NPU artifacts or an explicitly chosen CPU/GPU route | Resolve rejected artifact constraints, then full-model quality and performance |
+
+Expand the joint-execution row into separate deployments with and without
+NVIDIA when implementing it. Likewise, checkpoint size, precision, RAM SKU and
+OS variants require separate execution plans and results beneath each overview
+cell; a pass for one variant does not qualify the entire model or device family.
+
+For Qwen27, nominal four-bit language weights alone are about 12.6 GiB;
+the actual artifact, remaining weights, state, workspace and OS require more.
+Gate small-memory targets before export/integration investment. Record an
+artifact-specific capacity rejection rather than substituting a smaller model.
+Treat unenumerated mobile/embedded SKUs as new qualification rows.
+
+## Profiling protocol for every executable cell
+
+Use [the profiling harness](../../benchmarks/edge_harness/PROFILING.md) and keep
+raw samples, outputs, configuration, logs and traces. Record the actual installed
+runtime as well as the source revision. Run competing workloads serially on
+the same physical machine.
+
+| Dimension | Required measurements |
+|---|---|
+| Startup | Compilation, process/import/preparation, constructor/load, first output and warm restart separately; explicit cache conditions |
+| Workload | Short/medium/long inputs, concurrency 1 then 2/4 where admitted, at least 20 measured requests per group; separate warmup and state-boundary cases |
+| Text | TTFT, delivery/token intervals, decode rate, complete request time; effective prefill separated from isolated device compute |
+| Speech | First playable PCM, RTF, chunk arrival gaps, playback deficit count/duration, tail/flush and interruption latency |
+| Multimodal/VLA | Preprocessing, encoders, downstream completion, modality alignment, observation-to-action age and deadline misses |
+| Memory | Loading/runtime peaks, state growth with context/concurrency, workspace and transfers; physical RAM, WSL quota and VRAM kept distinct |
+| Placement | Actual executed devices and fallback; copies, conversions, synchronization, stage queues and handoff time |
+| Sustained behavior | At least 30 minutes; power mode, clocks, temperature, memory and latency trends; energy only within available sensor scope |
+| Reliability | Slow consumers, cancellation, repeated sessions, memory admission and owned-worker failure; no stale/duplicate output and verified retirement |
+| Instrumentation | Separate matched before/traced/after diagnostics; profiler RPC/export costs; retain uninstrumented timing baseline |
+
+Report p50/p95 with sample counts and measurement boundaries. Preserve failures
+and retries. Component sums are not E2E measurements, and whole-GPU power is
+not CPU/NPU or whole-device energy. Low-clock/power-limited measurements remain
+valid for those observed conditions; they do not establish optimized performance.
+
+For heterogeneous candidates, hold inputs, artifact quality, context, concurrency
+and power conditions fixed. Keep a split only if the full chain improves latency,
+capacity or energy after transfers, synchronization, initialization and contention.
+
+## Per-cell completion and repair record
+
+Progress each cell through artifact readiness, correctness, complete local
+execution, profiling and qualification. Functional and performance qualification
+are separate fields. A final record contains:
+
+- Exact device/OS and artifact/backend identities; declared modalities and limits.
+- Reproducible command and explicit execution plan, including actual placement.
+- Quality, state/streaming and memory-admission outcomes with raw evidence.
+- Performance distributions, sustained behavior and sensor limitations.
+- On failure: failing layer, configuration, observed reason, evidence and the
+  smallest next repair/experiment. Distinguish missing prerequisites from an
+  attempted run that failed, a rejected artifact and an unqualified result.
+
+Text latency and VLA deadlines require workload-specific product targets.
+Do not invent universal thresholds. A completed timing protocol alone is not
+a release pass. The current 60-cell matrix and its profiling follow-up are the
+starting backlog; subsequent repairs should replace only the affected cells
+after repeating their complete gates.

docs/edge/harness.md

@@ -4,6 +4,12 @@
 with. It exists because five earlier conclusions were wrong; see
 [methodology.md](methodology.md).
 
+For current Omni text/TTS execution, sustained load, host telemetry, separate
+tracing, worker-failure checks and evidence archival, use the
+[E2E profiling commands](../../benchmarks/edge_harness/PROFILING.md).
+The [60-pair profiling report](../../benchmarks/edge_harness/results/e2e_profiling_20260922/README.md)
+distinguishes measured desktop paths from missing complete mobile/PC pipelines.
+
 ## Running a comparison
 
 Arms are subprocess invocations of a single-run benchmark, so the measurement