Add admitted InternVLA policy stages and update device matrix
This commit is contained in:
1 parent
9df5ac8836
commit
48646da78e
38 files changed
+7221
-7
No files matched your search
@@ -43,6 +43,20 @@ path, while real observations/reference actions, units/time, shared-RAM
|
||||
admission, cancellation and sustained benefit remain open. It does not turn
|
||||
the joint CPU+iGPU+NPU matrix cell into a pass.
|
||||
|
||||
A later [bounded Omni InternVLA whole-policy stage](../../benchmarks/edge_harness/results/e2e_expansion_20260923/evidence/internvla_omni_policy/README.md)
|
||||
closes the admission and basic cancellation gaps for this **synthetic** path.
|
||||
The strict-loaded CPU policy and optional FP32 Radeon Cosmos worker each ran
|
||||
one warmup and 20 serial patterned requests with terminal action events.
|
||||
Omni CPU complete-request p50/p95 was 3.175/3.219 s; CPU+Radeon was
|
||||
3.120/3.197 s in a separate run. A 16 GiB shared-RAM reservation, 8 GiB
|
||||
pre-launch refusal, a public hybrid `AsyncOmni.generate` request, and
|
||||
in-flight hybrid abort with no stale output/remaining reservation passed.
|
||||
The hybrid action difference from CPU was 2.305% relative L2 on this fixture,
|
||||
without a task tolerance. A first hybrid shutdown quarantined its reservation;
|
||||
the corrected process-tree retirement and reruns ended at zero. Real
|
||||
observation/reference-action quality, physical units/order/step time,
|
||||
post-cancel restart, loading peak and sustained benefit remain open.
|
||||
|
||||
The WSL RTX MiniCPM-o image-to-text+speech path now passes for one 448×448
|
||||
synthetic red-square image under an explicit 0.61 thinker GPU budget. The
|
||||
previous 0.58 budget failed the 2,048-token KV admission gate; the successful
|
||||
@@ -197,7 +211,7 @@ capability and lifecycle implementation; a state-handle type alone is insufficie
|
||||
| M2 | Qwen3-TTS | Resolve desktop playback and shutdown findings and CPU compatibility; then mobile talker/predictor plus GPU vocoder | Complete PCM and tail, history/chunk correctness, interruption/recovery, quality checks, no post-startup underruns and RTF below 1 in the declared workload |
|
||||
| M3 | AMD stages | Connect compatible real encoders or other useful coarse stages through current Omni workers; start from the existing 890M vision evidence | Actual node/device placement, numerical and task quality, complete downstream output, shared-memory and handoff costs; reject unhelpful splits |
|
||||
| M4a | MiniCPM-o 4.5 | Three-stage desktop text+WAV produced coherent text and nonzero WAV on RTX 5090 Laptop under WSL and native Windows, and WSL CPU, using separate constrained plans. One synthetic red-square image and one synthetic tone each passed through the three-stage WSL RTX, native Windows RTX and WSL CPU paths to text and nonzero WAV. RTX text/token IDs matched across OS environments; CPU wording/token IDs differed while remaining plausible. The WSL RTX image plan needed a thinker GPU budget increase from 0.58 to 0.61 for KV admission. WSL multimodal shutdown cleanup remains open, including forced stage-0 termination on CPU. The CPU plan needed vLLM 0.28/0.29 processor compatibility and used swap; 20 serial **text** CPU requests measured p50 21.86 s/p95 22.97 s. Native Windows needed longer startup limits; 20 serial text requests measured p50 18.38 s/p95 18.73 s with host RAM/pagefile pressure. Add video encoder and persistent-state reference before mobile artifacts | Speech intelligibility/alignment, loading-peak admission, concurrency, broad image/audio-understanding suites, video, shutdown lifecycle, then combined streaming and interruption |
|
||||
| M4b | InternVLA-A1 | Real weights, observation preprocessing, shared prefix state, iterative action head and versioned action metadata; strict-load synthetic policy forwards now pass on WSL and native Windows, each on CPU and RTX 5090 Laptop | Reference action agreement on real observations, units/order/timestamps, observation age, stale-input handling and application-specific deadline reporting |
|
||||
| M4b | InternVLA-A1 | Strict-load synthetic policy forwards pass on WSL and native Windows CPU/RTX. A bounded WSL Omni whole-policy stage also passes on CPU and CPU+Radeon Cosmos with explicit shared-RAM admission, terminal action metadata and in-flight cancellation; the public hybrid entrypoint passes. This is not robot-task qualification. | Reference action agreement on real observations, physical units/order/step time, observation age and deadlines; post-cancel restart, loading peak, concurrency, power and thermal behavior. |
|
||||
| Independent | Qwen3.8-27B | Public Omni pipeline binding; text, then image/video and longer contexts; same-model CPU/iGPU artifact and explicit offload evaluation | Modality-specific quality, actual loading/runtime memory and measured performance; each precision/context receives its own qualification |
|
||||
|
||||
The initial M0 desktop text acceptance remains scoped to its tested checkpoint,
|
||||
|
||||
Reference in new issue
Block a user