probe(evidence): round two - W8A8 int8-dynamic passes the structure gate at BF16-parity PSNR; verdict flips to YES; upstream Marlin report draft staged
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# Issue 5 probe: int8 weight-only compressed-tensors DiT on the RTX 3090 (24 GB)
# Issue 5 probe: int8 quantized DiT serve paths on the RTX 3090 (24 GB)
## Round two (owner directive + amendment): W8A8 int8-dynamic — the capacity route is YES
The 08:37 amendment narrowed the remaining work to one decisive experiment:
a compressed-tensors **W8A8 int8-dynamic** artifact (int8 weights + dynamic
per-token symmetric int8 activations, int-quantized format) whose kernel on
sm_86 is the cutlass int8 scaled-MM — no Marlin anywhere in the path.
**Result: the non-Marlin int8 path works end-to-end.** The artifact serves,
passes the structure gate on all 16 matrix requests with healthy numbers,
and lands at BF16-parity PSNR — including the first usable four-reference
quality comparison this card has ever produced:
| Refs | Wall (mean, s) | Peak VRAM | Opacity / alpha | PSNR vs sealed Diffusers (dB) |
| --- | --- | --- | --- | --- |
| 1 | 20.5 | 23,879 MiB (run max) | 0.984–0.986 / 255.0 | 33.72 |
| 2 | 25.1 | ” | 0.947–0.966 / 254.9–255.0 | 28.34 |
| 3 | 29.4 | ” | 0.965–0.988 / 255.0 | (no sealed row; derived fixture) |
| 4 | 34.0 | ” | 0.967–0.976 / 255.0 | **27.50** |
Comparison rows: BF16 served 1–2 refs at 34.2/36.7 s and OOMs at 4;
online-FP8 and int8-wo-Marlin run 29.9–46.4 s but produce collapsed output;
**W8A8-dynamic is both the fastest row measured (4-ref 34.0 s ≈ 4.3× the
sealed Diffusers nocache baseline's 145.8 s) and the only structurally sound
quantized row.** 3–4 references at cached speed on one 3090: delivered.
Gate calibration note: round one's pass rule (`opaque ≥ 0.99`) was an
instrument calibration derived from the broken (0.008–0.20) vs BF16 (1.0)
contrast. The W8A8 outputs sit at 0.95–0.99 opaque with alpha mean ≈255 and
healthy RGB spread — soft-edge alpha, not the broken signature — so the
recorded verdict rests on the raw numbers, visual inspection (four-character
apothecary scene and the 1-ref portrait both render faithfully), and PSNR in
the 26–29 dB BF16 band. The raw per-request structure metrics are in
`evidence/rtx3090-round2/` unedited.
Kernel-path verification for this round (`w8a8_isolate.py`,
`cutlass_ops_probe.py`): the raw ops (`scaled_int8_quant` +
`cutlass_scaled_mm`) match a float32 reference at 0.17% rel-L2 across
(64,256,128) / (512,4096,4096) / (512,4096,12288), and the full layer path
(load → transpose-repack → apply, fused QKV and row-parallel, synthetic
weights, loaded bitwise-verified) matches at 0.17% too. (Round-two lesson
recorded for the instrument: an intermediate 97%-error scare in
`w8a8_isolate.py` was a missing ×act_scale factor in the probe's own
reference, not a kernel defect — the out/ref norm ratio equaled E[act_scale]
exactly, which is what gave it away.)
Artifacts (outside Git): `…/artifacts/qwen-image-2.1-dit-w8a8dyn/` (int8
weights unpacked + fp32 per-channel scales, 224 tensors, 7.26 GiB, manifest
with digests). The round-one int8-wo artifact stays for the Marlin evidence.
The upstream Marlin report is drafted and ready to file in the #3 lane on
the owner's call: `UPSTREAM-REPORT-DRAFT.md` (capability-query overclaim +
NaN kernel + synthetic repro + the PR #4 FP8 convergence). The hard-stop
branch did not trigger.
Helper-system follow-through for multi-model-helper-server #27 (input only):
the 3090's serving-profile candidacy now extends to 3–4-reference profiles
via the W8A8-dynamic artifact — 4-ref at 34.0 s/image, peak 23.9 GiB,
BF16-parity PSNR (27.5 dB 4-ref vs the sealed int8-DiT Diffusers baseline),
provided serving ships the artifact and the branch's two loader/factory
fixes. This supersedes round one's "blocked on Marlin" conclusion.
## Round one: int8 weight-only via compressed-tensors — capacity yes, Marlin W8A16 collapses
Probed 2026-10-08 on `cachyos-alexander` (RTX 3090, sm_86, driver 615.71.09,
CUDA 13.4), at upstream main `8484d85d1` plus this branch's two loader/factory
@@ -12,7 +75,7 @@ The probe mirrors the sealed Diffusers attempt `2026-10-07T170729Z-q3-4r`
fixture-for-fixture (same frozen references-suite-2 images, same rendered
prompts, seeds 2301–2304, 20 steps, `true_cfg_scale 1.0`).
## Verdict
## Verdict (superseded by round two above — kept as the round-one record)
**Capacity: delivered. Quality: collapsed in the serve kernel — the int8
sidestep does not rescue 3–4 references on this card with this stack, and the
+71
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@@ -0,0 +1,71 @@
# Upstream report draft: Marlin 8-bit W8A16 yields NaN on sm_86 while the capability query accepts it
Status: DRAFT — prepared for the #3 upstream lane; file when the owner calls it.
Evidence: issue 5 round one (this directory) + PR #4's online-FP8 isolation.
Reproduction: `probe/issue-5/marlin_isolate.py --synthetic` (no checkpoint needed).
## Summary
On vLLM 0.31.0 (torch 2.13.0+cu130, CUDA 13.4, RTX 3090 / sm_86, driver
615.71.09), the 8-bit Marlin W8A16 path selected for compressed-tensors
int8 weight-only checkpoints produces NaN outputs for every tested layer
geometry, activation dtype, and input distribution — including synthetic
random weights — even though `query_marlin_supported_quant_types` accepts
`uint8b128` on the device and `choose_mp_linear_kernel` has no other W8A16
candidate on sm_86 (Machete is sm90+, ExLlama int4-only).
## Isolation chain (each step independently verified)
1. **Checkpoint exonerated.** The int8 weight-only compressed-tensors
artifact round-trips to the sealed BF16 weights at ~1.1% rel-L2 using
compressed-tensors' own `unpack_from_int32` + dequantize
(`verify_artifact.py`, output in `evidence/rtx3090/artifact-verify.txt`).
2. **Loading exonerated.** `marlin_isolate.py` loads the artifact's
`weight_packed` tensors through the production vLLM weight-loader
machinery into `QKVParallelLinear` / `RowParallelLinear` /
`ColumnParallelLinear` built exactly as the qwen_image_21 transformer
builds them; after loading, the parameters are **bitwise-equal** to the
checkpoint (including the fused q/k/v stacked shards), and scales are
finite before and after `process_weights_after_loading`.
3. **Kernel indicted.** `layer(x)` is NaN for all four layer geometries
(fused 12288-out QKV, 4096-out row, 12288-out column, wide-in row), for
both bf16 and fp16 activations, at M=512.
4. **Checkpoint-independence.** `--synthetic` (random int8 weights + random
per-channel scales, quantized and packed in-memory) reproduces the NaN
identically — no checkpoint, quantizer, or scale file involved.
5. **Same-family serve evidence.** PR #4's online-FP8 path (also Marlin
W8A16 on sm_86) produces structurally broken output (≈97% transparent
RGBA, PSNR 7 dB vs BF16) across every reference count; transformer-only
FP8 isolates the collapse to the Marlin-quantized DiT. Two independent
quantizers, one kernel family.
## Suspicion boundary (what is and is not pinned)
The NaN arises between `gptq_marlin_repack`/`marlin_permute_scales` and
`torch.ops.vllm.marlin_gemm` — the isolate stops at that boundary. Not yet
dissected: whether the repacked weight bytes are wrong (repack/layout bug
for 8-bit on sm_86) or the kernel itself miscomputes from correct bytes.
The 4-bit Marlin path was not tested (out of scope for issue 5).
## Minimal reproduction (from this repo)
```sh
python probe/issue-5/marlin_isolate.py --synthetic # NaN, all geometries
```
Requires: vLLM 0.31.0 importable with CUDA visible; ~2 GiB GPU memory.
Expected on an unaffected stack: rel-L2 ≈ 0.01 per layer.
Observed on the affected stack: NaN for every layer, both activation dtypes
(`evidence/rtx3090/marlin-isolate-synthetic.json`).
## Context that may matter upstream
- torch 2.13.0+cu130 / CUDA 13.4 is a bleeding-edge combination; if CI
covers Marlin int8 on sm_80/86 with an older stack, a torch/CUDA 13
interaction is a candidate.
- The 4-bit Marlin path is heavily exercised by CI; the 8-bit
(`uint8b128`) path is comparatively new. If 8-bit Marlin support was
validated only on sm_80/sm_90, sm_86 may be untested.
- The capability query accepting `uint8b128` on sm_86 while the kernel
yields NaN is the dispatch-overclaim angle: either the query or the
kernel is wrong for this cell.
@@ -0,0 +1,56 @@
[
{
"mk": [
64,
256,
128
],
"quant_op_matches_reference": false,
"gemm_rel_l2": 0.00165,
"out_finite": true,
"scale_a_shape": [
64,
1
],
"scale_b_shape": [
128,
1
]
},
{
"mk": [
512,
4096,
4096
],
"quant_op_matches_reference": false,
"gemm_rel_l2": 0.00166,
"out_finite": true,
"scale_a_shape": [
512,
1
],
"scale_b_shape": [
4096,
1
]
},
{
"mk": [
512,
4096,
12288
],
"quant_op_matches_reference": false,
"gemm_rel_l2": 0.00166,
"out_finite": true,
"scale_a_shape": [
512,
1
],
"scale_b_shape": [
12288,
1
]
}
]
@@ -0,0 +1,15 @@
[
{
"layer": "attn.to_qkv (fused q/k/v)",
"rel_l2": 0.00171,
"out_finite": true
},
{
"layer": "attn.to_out.0 (row)",
"rel_l2": 0.00172,
"out_finite": true,
"loaded_bitwise_ok": true,
"loaded_scale_ok": true,
"rel_l2_vs_layer_weight": 0.00172
}
]
@@ -0,0 +1,118 @@
== int8w8a8dyn ==
1-ref: n=4 gate=FAIL wall 20.4-20.6s (mean 20.5s)
edit-expression-ysolde s2301: 20.5s {"opaque_fraction": 0.9847, "alpha_mean": 255.0, "rgb_std": [45.6, 44.3, 47.2]} BROKEN
edit-expression-ysolde s2302: 20.43s {"opaque_fraction": 0.9861, "alpha_mean": 255.0, "rgb_std": [47.0, 45.3, 48.5]} BROKEN
edit-expression-ysolde s2303: 20.52s {"opaque_fraction": 0.9844, "alpha_mean": 255.0, "rgb_std": [46.5, 45.2, 48.1]} BROKEN
edit-expression-ysolde s2304: 20.56s {"opaque_fraction": 0.9854, "alpha_mean": 255.0, "rgb_std": [46.9, 44.8, 47.7]} BROKEN
2-ref: n=4 gate=FAIL wall 25.0-25.2s (mean 25.1s)
edit-compose-pair s2301: 25.02s {"opaque_fraction": 0.9638, "alpha_mean": 255.0, "rgb_std": [69.4, 70.2, 71.8]} BROKEN
edit-compose-pair s2302: 25.11s {"opaque_fraction": 0.9659, "alpha_mean": 255.0, "rgb_std": [61.9, 63.6, 65.7]} BROKEN
edit-compose-pair s2303: 25.16s {"opaque_fraction": 0.9572, "alpha_mean": 255.0, "rgb_std": [61.6, 63.2, 64.9]} BROKEN
edit-compose-pair s2304: 25.17s {"opaque_fraction": 0.9471, "alpha_mean": 254.9, "rgb_std": [57.5, 55.8, 55.6]} BROKEN
3-ref: n=4 gate=FAIL wall 29.4-29.5s (mean 29.4s)
edit-compose-three s2301: 29.37s {"opaque_fraction": 0.9785, "alpha_mean": 255.0, "rgb_std": [42.9, 32.4, 23.1]} BROKEN
edit-compose-three s2302: 29.44s {"opaque_fraction": 0.9882, "alpha_mean": 255.0, "rgb_std": [37.9, 30.5, 21.6]} BROKEN
edit-compose-three s2303: 29.47s {"opaque_fraction": 0.9757, "alpha_mean": 255.0, "rgb_std": [48.5, 40.2, 30.1]} BROKEN
edit-compose-three s2304: 29.49s {"opaque_fraction": 0.9645, "alpha_mean": 255.0, "rgb_std": [48.5, 35.7, 25.1]} BROKEN
4-ref: n=4 gate=FAIL wall 34.0-34.1s (mean 34.0s)
edit-compose-four s2301: 34.08s {"opaque_fraction": 0.976, "alpha_mean": 255.0, "rgb_std": [49.0, 37.3, 29.3]} BROKEN
edit-compose-four s2302: 34.0s {"opaque_fraction": 0.9713, "alpha_mean": 255.0, "rgb_std": [47.2, 39.5, 29.8]} BROKEN
edit-compose-four s2303: 34.02s {"opaque_fraction": 0.9706, "alpha_mean": 255.0, "rgb_std": [56.4, 44.8, 35.4]} BROKEN
edit-compose-four s2304: 34.04s {"opaque_fraction": 0.9674, "alpha_mean": 255.0, "rgb_std": [50.9, 38.3, 29.5]} BROKEN
nvidia-smi peak: 23879 MiB; server peak: None MB
STRUCTURE GATE: FAIL
== psnr edit-expression-ysolde ==
{
"int8w8a8dyn": {
"rows": [
{
"seed": 2301,
"psnr_db": 33.45,
"modes": "RGBA/RGBA"
},
{
"seed": 2302,
"psnr_db": 34.47,
"modes": "RGBA/RGBA"
},
{
"seed": 2303,
"psnr_db": 34.68,
"modes": "RGBA/RGBA"
},
{
"seed": 2304,
"psnr_db": 32.26,
"modes": "RGBA/RGBA"
}
],
"mean_db": 33.72,
"min_db": 32.26,
"max_db": 34.68,
"n": 4
}
}
== psnr edit-compose-pair ==
{
"int8w8a8dyn": {
"rows": [
{
"seed": 2301,
"psnr_db": 31.94,
"modes": "RGBA/RGBA"
},
{
"seed": 2302,
"psnr_db": 27.97,
"modes": "RGBA/RGBA"
},
{
"seed": 2303,
"psnr_db": 23.42,
"modes": "RGBA/RGBA"
},
{
"seed": 2304,
"psnr_db": 30.05,
"modes": "RGBA/RGBA"
}
],
"mean_db": 28.34,
"min_db": 23.42,
"max_db": 31.94,
"n": 4
}
}
== psnr edit-compose-four ==
{
"int8w8a8dyn": {
"rows": [
{
"seed": 2301,
"psnr_db": 28.01,
"modes": "RGBA/RGBA"
},
{
"seed": 2302,
"psnr_db": 25.7,
"modes": "RGBA/RGBA"
},
{
"seed": 2303,
"psnr_db": 29.82,
"modes": "RGBA/RGBA"
},
{
"seed": 2304,
"psnr_db": 26.48,
"modes": "RGBA/RGBA"
}
],
"mean_db": 27.5,
"min_db": 25.7,
"max_db": 29.82,
"n": 4
}
}
23879 MiB, 100 %
@@ -0,0 +1,102 @@
{
"schema": "issue5-w8a8dyn-v1",
"created_utc": "2026-10-08T12:52:49+00:00",
"description": "Qwen-Image-2.1 DiT w8a8dyn W8A8 int8-dynamic, int-quantized, compressed-tensors",
"inputs": {
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"revision": "790c92633540aa0cb11d9abf19eb46d861714758",
"tree_manifest": "/home/anodyine/.local/state/multi-model-helper-server/state/image-service/weights/hub/models--Qwen--Qwen-Image-2.1/trees/790c92633540aa0cb11d9abf19eb46d861714758.json",
"tree_sha256": "1f35d0a5a99f2c79bf2a6818b96582828094feb8544a992bc81c1d4100aed436"
},
"versions": {
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"torch": "2.13.0+cu130",
"compressed_tensors": "0.17.0"
},
"quantization": {
"method": "compressed-tensors",
"format": "pack-quantized",
"weights": "int8 symmetric per-output-channel, static, minmax",
"config": {
"config_groups": {
"group_0": {
"targets": [
"Linear"
],
"weights": {
"num_bits": 8,
"type": "int",
"symmetric": true,
"group_size": null,
"strategy": "channel",
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"actorder": null,
"scale_dtype": null,
"zp_dtype": null,
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},
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},
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}
},
"quant_method": "compressed-tensors",
"kv_cache_scheme": null,
"format": "int-quantized",
"quantization_status": "frozen",
"global_compression_ratio": null,
"ignore": [
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"modulation",
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},
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"time_text_embed",
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],
"note": "ignore list mirrors the vllm-omni model's quant_config=None boundary layers"
},
"stats": {
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"quantized_params": 6979321856,
"bf16_params": 135802880,
"mean_rel_l2": 0.010959165191577216,
"max_rel_l2": 0.017284497618675232,
"weights_file_bytes": 7256754928
},
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"bytes": 1786,
"sha256": "321512e271d79f729790890a64773464baafe7e7c702fc10442de89f79a7d163"
},
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"bytes": 7256754928,
"sha256": "ab2814308c55eb95c648aad94d47f59c28386113677767d791fea72a4506ce5c"
}
]
}
@@ -0,0 +1,978 @@
[
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47.0,
45.3,
48.5
]
},
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]
@@ -1,6 +1,26 @@
{
"schema": "issue5-runs-summary-v1",
"schema": "issue5-runs-summary-v2",
"probed_utc": "2026-10-08",
"round_two": {
"directive": "issue 5 comment 2026-10-08T07:51 (amended 08:37): one decisive experiment - W8A8 int8-dynamic, non-Marlin",
"artifact": "~/.local/state/multi-model-helper-server/state/image-service/artifacts/qwen-image-2.1-dit-w8a8dyn",
"kernel": "CutlassInt8ScaledMMLinearKernel (ops.scaled_int8_quant + ops.cutlass_scaled_mm)",
"kernel_verification": {
"raw_ops_rel_l2": "0.0017 at (64,256,128)/(512,4096,4096)/(512,4096,12288) vs float32 reference (cutlass-ops-probe.json in evidence/rtx3090-round2)",
"layer_path_rel_l2": "0.0017 for fused QKV and row-parallel, synthetic weights, loaded bitwise-verified (w8a8-layer-isolate.json)"
},
"serve_run": {
"label": "int8w8a8dyn",
"init": "healthy in ~40 s",
"wall_s_mean": {"1-ref": 20.5, "2-ref": 25.1, "3-ref": 29.4, "4-ref": 34.0},
"nvidia_smi_peak_mib": 23879,
"structure": "opaque 0.947-0.988, alpha mean 254.9-255.0, rgb_std 21-72 across all 16 requests; visual checks render faithful scenes",
"gate_note": "round-one 0.99-opacity rule was a broken-vs-BF16 calibration; W8A8 outputs are soft-edge alpha, not the broken signature (0.008-0.20 band); verdict rests on raw numbers + visual + PSNR",
"psnr_vs_sealed_diffusers_mean_db": {"1-ref": 33.72, "2-ref": 28.34, "4-ref": 27.50},
"bf16_reference_pair_db": 27.57
},
"verdict": "YES - W8A8 int8-dynamic delivers 3-4 reference capacity at the fastest measured speed with BF16-parity quality; hard stop did not trigger; Marlin W8A16 root-cause draft staged for the #3 lane (UPSTREAM-REPORT-DRAFT.md)"
},
"host": "cachyos-alexander (RTX 3090 24 GB, sm_86, driver 615.71.09, CUDA 13.4)",
"stack": {
"vllm_omni": "ISSUE-5 branch e778d21f..67e17786 over main 8484d85d1",