This website requires JavaScript.
Explore
Help
Sign In
anodyine
/
vllm-omni
Watch
1
Star
0
Fork
0
Code
Issues
4
Pull Requests
2
Actions
Packages
Projects
Releases
Wiki
Activity
Files
e5c0afc99432dba767dcb66f28b0fb9aa43ab1af
vllm-omni
/
.buildkite
/
common
T
History
Sy03
a9e2117f5e
[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (
#7781
)
...
Signed-off-by: Sy03 <
1370724210@qq.com
>
2026-09-20 23:03:08 -07:00
..
scripts
[CI/Build] Add experimental AMD MI300 nightly lane (
#6978
)
2026-09-14 12:02:28 +08:00
ci_mirror_hardwares.yml
[Rebase] Rebase to vLLM 0.29.0 (
#7230
)
2026-09-10 12:08:28 +08:00
ci_source_file_dependencies.yml
[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (
#7781
)
2026-09-20 23:03:08 -07:00