Sy03 a9e2117f5e [Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (#7781) ...

Signed-off-by: Sy03 <1370724210@qq.com>

2026-09-20 23:03:08 -07:00

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amd

[CI/Build][ROCm] Cache AMD test images in registry (#7712)

2026-09-20 09:51:14 +08:00

common

[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (#7781)

2026-09-20 23:03:08 -07:00

cuda

[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (#7781)

2026-09-20 23:03:08 -07:00

intel

[XPU][Docker] Align XPU image and CI with vLLM v0.29.0 (#7441)

2026-09-11 15:54:28 -05:00

npu

[Test][Ascend] Share HunyuanVideo-1.5 E2E across GPU and NPU (#7547)

2026-09-18 08:49:08 +00:00

release

[CI/Build] Add nightly DockerHub publish and cleanup to release pipeline (#6048)

2026-08-12 17:30:55 +08:00