probe: Qwen-Image conditioning-KV spill probe on RTX 3090 / RTX 5080 (issue 2) #4
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Reference: anodyine/vllm-omni#4
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Summary
Evidence-only change closing issue 2's probe: whether Qwen-Image-2.1's conditioning KV can spill to host DRAM on the RTX 3090 (24 GB) and RTX 5080 (16 GB). No code changes to the stack — the PR carries the probe kit, per-host run records, and the findings report under
probe/issue-2/.Verdict: not-built on both cards.
Cache located and documented with file:line, allocator (plain GPU tensor clones,
DENSE_LEGACY, not paged), and the exact flags reaching it (prefix_kv_cache_dtypeextras, eager/cuda-graph-decode;--swap-space/--cpu-offload-gbdo not exist in this fork). Bonus finding: the recipe's deploy-YAML extras route forprefix_kv_cache_dtypedoes not reach the served transformer on8484d85d(byte-identical outputs with/without; offlineOmni(extras=…)kwarg works).Evidence
probe/issue-2/FINDINGS.md; key numbers:--enable-cpu-offload: 1-ref OK 34.2 s, 2-ref OK 36.7 s (peak 24,015 MiB), 4-ref HTTP 500 OOM.expandable_segments:Trueremoves fragmentation (1.84 GiB → 0.5 GiB reserved-unallocated); 4-ref still OOMs with 22.29 GiB genuinely allocated.edit-compose-pairseeds 2301–2304: 36.6–36.9 s/image vs Diffusers 81.16 s; PSNR mean 27.57 dB (26.09–28.92, RGBA-on-RGBA) against the sealed attempt2026-10-07T170729Z-q3-4r.Checks run
Observed: both hosts' full probe sequences (server lifecycle under
systemd-run --userunits, 1 Hz nvidia-smi series, one request at a time, fixed seeds); all per-run records inprobe/issue-2/evidence/*/runs-summary.jsonand on-hostruns/<label>/directories. The four-reference PSNR cell is capacity-blocked on every served flag set — recorded honestly; the two-reference row is the highest-count comparison the 3090 can produce.Documentation disposition
updated — the probe report and evidence records are the deliverable (
probe/issue-2/FINDINGS.md).Merge Danger
Door: one-way (evidence and probe scripts only; trivially revertible as a git revert, hence cheap to undo, but the record should persist).
Blast Radius: none at runtime — no stack code touched.
probe/issue-2/is a new directory nothing references.Rollback:
git revert <merge-commit>.Reviewer prerequisites
cachyos-alexander(192.168.0.39) andcachyos-9900x-o11d(192.168.0.40), both hosts'~/Projects/vllm-omni-val/environments (already standing), sealed weights + frozen suite present on both. The 5080 leg additionally used a userspace CPython 3.13.16 (~/.local/pythons/cpython-3.13) since the host ships only 3.14.Pre-Test Setup
Expected:
probe/issue-2/with FINDINGS.md, five scripts/YAML, fixtures.json, and two evidence directories.Manual Test Plan
Action: Read
probe/issue-2/FINDINGS.mdend to end.Expected: verdicts per card match the issue's three-world taxonomy (
not-builtboth), cache located by file:line, allocator and reachable flags named, both run matrices carry peak VRAM / wall time / PSNR or the honest reason a cell is blocked, inputs reproducible fromfixtures.json+ flags recorded per run.Action (optional, re-verify one cell on the 3090):
Expected: 1-ref OK, 2-ref OK, 4-ref HTTP 500 CUDA OOM; wall times within a few seconds of FINDINGS.md's. Stop the unit afterwards (
systemctl --user stop issue2-serve).Failure and recovery
If a re-verification diverges from the record, retain the new
runs/output and the serve/vram logs; do not mark the review passed on a diverging number — the record would need a re-run matrix, not a note.Post-Merge Cleanup
Review finding — one configuration is missing from the 3090 serve matrix:
--quantization fp8(weight-only, Marlin on sm_86).Issue #1's own addendum validated this exact path on this exact card offline: BF16
--enable-cpu-offloadpeaked 23.0 GB, while--quantization fp8+ offload peaked 18.4 GB — the DiT drops from ~13.25 to ~7.1 GB resident. The 3090 matrix here covers cpu-offload, layerwise, expandable-segments, and the offlinefp8_vKV-dtype knob, but never the model-weight fp8 on the serve path (the 5080 matrix includes fp8, but only as one of the six init failures).The arithmetic says this is precisely the missing headroom: this PR's own finding is that the 4-reference OOM binds on the resident BF16 working set (22.29 GiB genuinely allocated) and not the conditioning KV (~0.3 GiB/ref, per-request, freed). Freeing ~6 GiB of resident BF16 DiT puts that working set near 16.3 GiB — four references should fit on 24 GB, three comfortably, and the 2-ref cached row likely gains a few percent as well (offline fp8 measured 58.56 vs 61.26 s at 50 steps).
Requested before merge:
vllm serve ... --enable-cpu-offload --quantization fp8row on the 3090; retry one-, two-, three-, and four-reference requests (three refs is currently untested anywhere).init_parametersunder fp8 on the 3090 the way it does on the 5080 — skeleton materializing on-device before quantization — record that as its own finding with the same file:line; check whether a--load-formatvariant or meta-device init avoids it, and if not, that is a second upstream-worthy bug (sub-skeleton VRAM cannot boot quantized serving at all), separate from the DRAM verdict.The not-built verdict for DRAM offload itself is well-evidenced (unpaged tensor clones, DENSE_LEGACY, no swap flags in this fork, file:line located) and unaffected — this comment challenges only the reference-capacity ceiling on the 3090, which is currently concluded from a matrix that omits the one quantization its own prior issue proved works on this card.
__zcode_status=$?
if [ "$__zcode_status" -eq 0 ]; then pwd -P > '/tmp/zcode-4c844978-0de0-4cd6-ac3a-7dee0f7f94fe-cwd'; fi
exit "$__zcode_status"
Review answer — fp8 serve row run (commit
4f5f99d8). You were right that the row was missing, and right about the arithmetic:vllm serve … --enforce-eager --enable-cpu-offload --quantization fp8initializes on the 3090 and all four reference counts fit and run — 1-ref 29.9 s, 2-ref 34.1 s, the previously untested 3-ref 38.9 s, 4-ref 44.3 s (server peak 23,522 MB; nvidia-smi series max 23,983 MiB; measured seeds 2301–2304 for pair/three/four inruns-summary.json). Marlin W8A16 is even faster than BF16 — 4-ref at 3.3× the Diffusers nocache baseline (145.8 s).But the fp8 row cannot be merged as a working configuration: every fp8 output is structurally broken on this commit and card. The signature is identical everywhere — RGBA ~96.5–97% transparent (opaque fraction 0.008–0.035, alpha mean ≈115), near-flat grey RGB, PSNR 7.03–9.02 dB vs the sealed baseline (BF16 on the same requests: 100% opaque, 26–29 dB). Isolation runs:
fp8minusimg_mlp(your--ignored-layersvariant — serve-CLI-unreachable, so via offlineOmni(quantization_config=…)): still collapsed.And a correction to #1's record this uncovered: reinspecting issue #1's own fp8 artifacts (
qwen_image_21_fp8_all_rtx3090.png,…_imgmlp_…) shows the same collapse (opaque fraction 0.035 both) — that validation checked rc=0 and image production, not output structure, so "fp8 works on this card" was overstated. The 18.4 GB capacity measurement stands; the implied quality does not. Worth noting upstream never measured DiT-fp8 PSNR either (the recipe quotes PSNR only for text-encoder fp8, 32.1 dB on H200) — this adds the Ampere/Marlin cell: online FP8 DiT weights produce near-noise latents for Qwen-Image-2.1.Net effect on the verdicts: 3090 stays
not-built— the capacity headroom you projected is real, but the only knob that unlocks it ships broken output on this commit, so the upstream order is fp8-output-correctness first, capacity second, and a KV spill remains unwarranted by the arithmetic. The 3-ref and 4-ref PSNR cells under fp8 are recorded inpsnr-fp8-rows.jsonas broken-output data, not usable comparisons. FINDINGS.md carries the full new section.(Apologies for the stray garbled comment just above — shell-wrapper text from a malformed local command; harmless, one-click delete.)
Convergence record (from issue 5 / PR #6, per the 08:51 directive): the online-FP8 collapse isolated here and the offline int8-wo collapse from issue 5 are one kernel family's defect — Marlin W8A16 on sm_86 — now with the quantizers fully exonerated on the far side of the kernel.
Issue 5's int8-wo compressed-tensors artifact round-trips to the sealed BF16 weights at ~1.1% rel-L2 (compressed-tensors' own unpacker), loads bitwise-identically through the serve path (fused q/k/v shards included), scales finite pre/post Marlin repack — and layer(x) is NaN for real and synthetic int8 weights, all four DiT layer geometries, both bf16/fp16 activations, while the capability query accepts uint8b128 on the card. Two independent quantizers (online FP8 here, offline int8-wo there), one kernel family, one broken cell.
The surviving root-cause shape per issue 5's amendment: a dispatch overclaim for the 8-bit Marlin W8A16 path on this architecture (vllm 0.31.0 / torch 2.13.0+cu130 / CUDA 13.4).
The capacity consequence is resolved elsewhere: a W8A8 int8-dynamic artifact (cutlass int8 scaled-MM, no Marlin) serves 1-4 references at 20.5-34.0 s with BF16-parity PSNR (27.5 dB at 4 refs vs the sealed baseline) — so this FP8 row's brokenness is kernel-path-specific, not an int8/quantization limit.
Ready-to-file upstream report staged in PR #6 at probe/issue-5/UPSTREAM-REPORT-DRAFT.md, with the checkpoint-free reproduction (marlin_isolate.py --synthetic).
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