Chendi.Xue
|
034af1f657
|
[CI][XPU]switch to use vLLM base docker for XPU (#6727)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-08-29 09:03:00 +08:00 |
|
Chendi.Xue
|
161b005cfc
|
[XPU][CI] Fix xpu after rebasing for 0.25.0 (#5066)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-07-13 15:34:27 +08:00 |
|
Chendi.Xue
|
e7b281799e
|
[XPU CI][0.24] fix xpu ci by update pipeline-intel.yaml and triton version (#4805)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-07-01 03:51:06 +00:00 |
|
Chendi.Xue
|
60ccadfbb6
|
[WAN_S2V] Enable HSDP for wan s2v (#4458)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-28 06:27:58 +02:00 |
|
Chendi.Xue
|
eb81914c64
|
[S2V] Add sequence parallelism support to WanS2VTransformer3DModel (#4276)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-24 14:04:04 +08:00 |
|
 Chendi.XueandHongsheng Liu
|
e7f0db1067
|
[SDXL] SDXL model enabling (#4331)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-06-16 22:51:11 +08:00 |
|
Chendi.Xue
|
c58a02c873
|
[XPU][CI] Fix ERROR ...test_glm_image_sp.py - Failed: 'sp' not found in markers (#4451)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-16 05:31:04 +08:00 |
|
Chendi.Xue
|
a9ee92ddec
|
[XPU] update Dreamzero to support any HW (#4399)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-13 15:32:39 +00:00 |
|
Chendi.Xue
|
6506ed3d4d
|
[XPU][CI] Fix docker build slowness (#4402)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-13 10:59:15 +08:00 |
|
Chendi.Xue
|
3fe3aa359b
|
[XPU][COSMOS3] removing cuda hardcode and make VLLM_VIDEO_SYNC_TIMEOUT a tunable config (#4360)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-12 04:55:07 +00:00 |
|
 Chendi.XueandHongsheng Liu
|
5414f78e5f
|
[WAN2.2-S2V] Add server API for image + audio (#3394)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-06-11 18:50:03 +08:00 |
|
Chendi.Xue
|
f174ee54b0
|
[XPU] Add sage_attn backend (#3785)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-09 19:28:18 +08:00 |
|
 Chendi.XueandMengkejiergeli Ba
|
31f882935d
|
[XPU][S2V] Optimize Wan2.2 S2V: RoPE refactor + cache_dit enabling (#4062)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Mengkejiergeli Ba <mengkejiergeli.ba@intel.com>
|
2026-06-05 06:20:16 +08:00 |
|
Chendi.Xue
|
2a2033df02
|
[XPU][Rebase v0.22] Fix for 0.22 rebase (#4059)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-06-02 10:16:44 +08:00 |
|
Chendi.Xue
|
f43bb124bc
|
[CI][XPU]Fix sage_attn hard-code import for cuda (#3994)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-30 09:43:14 +08:00 |
|
Chendi.Xue
|
1903cee56a
|
[MXFP8][XPU] enable mxfp8 using vLLM main repo method (#3782)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-28 02:47:22 +00:00 |
|
Chendi.Xue
|
12bcc32c3d
|
[XPU][CI] fix test_qwen2_5_omni_expansion.py::test_mix_to_audio (#3761)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-20 12:40:08 +08:00 |
|
Chendi.Xue
|
475a4002b0
|
[XPU] set flash_attn as default diffusion attn backend and fix k_len for cross_attn (#3525)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-18 23:58:15 +00:00 |
|
Chendi.Xue
|
6d37e77fb2
|
[XPU] update dockerfile and CI to 0.21.0 (#3675)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-18 03:06:56 +00:00 |
|
Chendi.Xue
|
2856ff7aea
|
[XPU][DOCKER] update dockerfile.xpu after main repo updating to pt2.11 (#3393)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-05-07 06:45:30 +08:00 |
|
 Chendi.XueandHongsheng Liu
|
4e41b7bc23
|
Enable Wan2.2-S2V modeling to vLLM-omni (#2751)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-05-06 08:03:48 +08:00 |
|
 Chendi.XueandCanlin Guo
|
353ac8a402
|
[Enhancement] Offload transformer after switch to transformer-2 (#3224)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Canlin Guo <canlinguosdu@gmail.com>
|
2026-05-05 23:48:46 +00:00 |
|
Chendi.Xue
|
8e9b497387
|
[XPU] Enable torch inductor for xpu (#3113)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-04-25 08:59:52 +08:00 |
|
 Chendi.XueandCanlin Guo
|
4febac1efa
|
[DOC] intel GPU model support list (#2154)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Signed-off-by: Canlin Guo <961750412@qq.com>
Co-authored-by: Canlin Guo <961750412@qq.com>
|
2026-03-25 06:22:31 +00:00 |
|
Chendi.Xue
|
d71c9ae60f
|
[BugFIX] enable Hunyuan image3 with stage selection among text_to_image/image_to_text (#1826)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-03-24 13:00:21 +08:00 |
|
Chendi.Xue
|
28aee51a59
|
[FP8] enable hunyuan-image-3 diffusion model with fp8 online quant (#1935)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-03-22 13:02:16 +08:00 |
|
 Chendi.XueandHongsheng Liu
|
ba5a66b15b
|
[XPU] update bagel modeling to remove cuda hardcode, add xpu stage_config (#1931)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-03-19 16:55:16 +08:00 |
|
 Chendi.XueandHongsheng Liu
|
e1ac1826cd
|
[CI]init intel ci dispatch in buildkite folder (#1721)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-03-19 09:50:31 +08:00 |
|
 Chendi.XueandSYLAR
|
ca37f221a8
|
update GpuMemoryMonitor to DeviceMemoryMonitor for all HW (#1526)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Signed-off-by: Chendi.Xue <chendi.xue@intel.com>
Co-authored-by: SYLAR <125541396+lishunyang12@users.noreply.github.com>
|
2026-03-11 12:19:36 +08:00 |
|
 Chendi.Xueandgcanlin
|
482f9b89a1
|
[XPU][NPU][ROCM] enable cpu_offloading flag for non_cuda (#1488)
Signed-off-by: gcanlin <canlinguosdu@gmail.com>
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: gcanlin <canlinguosdu@gmail.com>
|
2026-02-27 14:52:15 +08:00 |
|
 Chendi.XueandHongsheng Liu
|
43a9e48ff7
|
[XPU] fix qwen_omni after rebase to v0.16.0 (#1416)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-02-27 06:44:48 +08:00 |
|
Chendi.Xue
|
d2f015edce
|
[0.16.0] remove cuda hard-code for Hunyuan Image3 (#1402)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-02-20 13:23:31 +08:00 |
|
Chendi.Xue
|
0b577a7263
|
[v0.16.0][BUG FIX]Fix hunyuan MOE after update to 0.16.0 (#1401)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
|
2026-02-19 23:57:11 +13:00 |
|