3 people f26f9c3a7f [Diffusion] Implement paged AR↔DiT KV connector ("v1", reusing vllm's native mooncake) (#6310) ...

Signed-off-by: asukaqaq-s <1311722138@qq.com>
Signed-off-by: Huang, Zeyu <11222265+fhfuih@users.noreply.github.com>
Co-authored-by: asukaqaq-s <1311722138@qq.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>

2026-09-06 05:41:54 +08:00

..

__init__.py

[NPU][Model] Add distilled 4-step sigma schedule support for MiniMax H3 t2va (#5991)

2026-08-11 13:46:10 +08:00

base_scheduler.py

[Diffusion] Implement paged AR↔DiT KV connector ("v1", reusing vllm's native mooncake) (#6310)

2026-09-06 05:41:54 +08:00

interface.py

[Diffusion] Implement paged AR↔DiT KV connector ("v1", reusing vllm's native mooncake) (#6310)

2026-09-06 05:41:54 +08:00

request_scheduler.py

[Perf] Support request-level batching for Wan2.2 pipelines (#5676)

2026-08-15 23:58:36 +08:00

sigma_schedule.py

[Feature][MiniMax-H3] Fuse the FastH3 four-step adapter at load time (#6714)

2026-08-31 12:04:58 +08:00

step_scheduler.py

[Refactor]: clean up diffusion scheduler interfaces (#5216)

2026-07-22 14:05:49 +08:00