Wang fuyin 3d7fc3b9ba [Config] Read engine args from VllmOmniConfig (#5678) ...

Signed-off-by: Acerak01-fy <wfy2003324@163.com>
Signed-off-by: Wang  fuyin <wfy2003324@163.com>

2026-08-07 11:17:33 +08:00

..

composable_parallel

[Core] Composable parallel: Phase 1 strategy overlay (TP/DP/stage-replica) (RFC #4084) (#4281)

2026-07-10 21:29:24 -06:00

__init__.py

[Config] Add structured VllmOmniConfig classes (#4425)

2026-06-25 17:48:20 +08:00

config_factory.py

[New Model] support nemotron Audex (#4976)

2026-07-28 03:58:22 +00:00

endpoint_policy.py

[Core / Bugfix] Add Mechanism for Endpoint Rejection (#4762)

2026-07-08 09:00:47 -06:00

lora.py

[Feature] Diffusion LoRA Adapter Support (PEFT compatible) for vLLM alignment (#758)

2026-01-27 10:22:40 +08:00

model.py

[Diffusion] Add Minimax-H3 modular pipeline support (#5720)

2026-08-06 11:43:23 +00:00

omni_config.py

[Config] Read engine args from VllmOmniConfig (#5678)

2026-08-07 11:17:33 +08:00

pipeline_registry.py

[Feature] PersonaPlex (Moshi-based full-duplex S2S): native vLLM port + duplex serving (#4771)

2026-08-04 20:10:33 -07:00

server_settings.py

[Frontend] Configurable video storage backends with TTL (#2531)

2026-06-19 17:41:22 -06:00

stage_config.py

feat(minimax-h3): enable 2x RTX 4090/5090 with DLO (#5764)

2026-08-06 09:02:29 +08:00

yaml_util.py

[Config Refactor][1/2] Model Pipeline Configuration System (#1115)

2026-03-12 21:09:34 +08:00