Zhou TaichangandClaude Opus 5 aff7d64948 [Rebase] Rebase to vLLM 0.29.0 (#7230) ...

Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Zhou Taichang <tzhouam@connect.ust.hk>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>

2026-09-10 12:08:28 +08:00

..

test_amd_bootstrap.py

[CI][ROCm] Match CUDA/NPU L2/L3 label routing (#6966)

2026-09-09 13:47:15 +00:00

test_amd_pipeline.py

[CI][ROCm] Fix deterministic AMD L3 blockers (#6884)

2026-09-01 22:53:00 +08:00

test_amd_suite_selection.py

[CI][ROCm] Match CUDA/NPU L2/L3 label routing (#6966)

2026-09-09 13:47:15 +00:00

test_skip_ci.py

[CI] Select mirror_hardwares presets via MIRROR_HW (H100/B200) (#5543)

2026-09-02 15:39:49 +00:00

test_upload_pipeline.py

[Rebase] Rebase to vLLM 0.29.0 (#7230)

2026-09-10 12:08:28 +08:00

test_vllm_omni_package_discovery.py

[CI/Bugfix] Move CI editable APP_DIR to /opt/vllm-omni for k8s package discovery (#5364) (#5368)

2026-07-24 16:34:30 +00:00