Sy03andYueqian Lin 9eaca72382 [Perf][VoxCPM2] Add unified decode graph optimization (#4606) ...

Signed-off-by: Sy03 <1370724210@qq.com>
Co-authored-by: Yueqian Lin <70319226+linyueqian@users.noreply.github.com>

2026-07-04 05:30:48 +00:00

..

__init__.py

[Config] Add structured VllmOmniConfig classes (#4425)

2026-06-25 17:48:20 +08:00

config_factory.py

[Rebase] Rebase to vllm v0.24.0 (#4709)

2026-06-30 19:41:06 +08:00

lora.py

[Feature] Diffusion LoRA Adapter Support (PEFT compatible) for vLLM alignment (#758)

2026-01-27 10:22:40 +08:00

model.py

[Perf][TTS] Bounded-K active-stream window for Stage 1 (RFC #3535) (#3592)

2026-06-01 21:59:10 +08:00

omni_config.py

[Core] Remove dead custom_process_input_func hooks in stage input processors (#4531)

2026-06-29 05:17:25 +02:00

pipeline_registry.py

[Model] Add Ming-omni-tts MoE 16.8B-A3B + CFM CUDAGraph (#4341)

2026-06-25 22:11:35 +08:00

server_settings.py

[Frontend] Configurable video storage backends with TTL (#2531)

2026-06-19 17:41:22 -06:00

stage_config.py

[Perf][VoxCPM2] Add unified decode graph optimization (#4606)

2026-07-04 05:30:48 +00:00

yaml_util.py

[Config Refactor][1/2] Model Pipeline Configuration System (#1115)

2026-03-12 21:09:34 +08:00