JiangJie ZhangandSamit c45ac74d43 [Core][Frontend] Support request-level batching for diffusion pipelines (#4079) ...

Signed-off-by: jader <yjader@foxmail.com>
Co-authored-by: Samit <285365963@qq.com>

2026-06-29 18:09:19 +02:00

..

test_adapter_and_flow.py

[Perf] Optimize Higgs Audio v3 serving (#4204)

2026-06-11 13:29:31 -07:00

test_bagel_mooncake_connector.py

[CI] Reducing mithril-h100-pool in ready&merge CI, optimize ready CI duration (#4354)

2026-06-29 05:17:57 +00:00

test_bagel_shared_memory_connector.py

[CI] Reducing mithril-h100-pool in ready&merge CI, optimize ready CI duration (#4354)

2026-06-29 05:17:57 +00:00

test_basic_connectors.py

[Perf] Optimize Higgs Audio v3 serving (#4204)

2026-06-11 13:29:31 -07:00

test_chunk_transfer_adapter.py

[Refactor] Output Processor Phase 2: separate multimodal output channel (#1601) (#2744)

2026-06-12 15:19:14 +08:00

test_kv_async_prefetch.py

[Core][Frontend] Support request-level batching for diffusion pipelines (#4079)

2026-06-29 18:09:19 +02:00

test_kv_flow.py

[Core][Frontend] Support request-level batching for diffusion pipelines (#4079)

2026-06-29 18:09:19 +02:00

test_mooncake_transfer_engine_buffer.py

Yuanrong TransferEngine Connector for NPU (#3180)

2026-05-20 14:51:33 +08:00

test_mooncake_transfer_engine_rdma.py

[Rebase] Rebase to vllm v0.21.0 (#3530)

2026-05-16 18:18:43 +08:00

test_omni_connector_configs.py

[CI]: Add core_model and cpu markers for L1 use case. (#1709)

2026-03-10 17:39:37 +08:00

test_shm_connector.py

[Bugfix] [CI] [ROCm] [CUDA] Fix voxtral test (#4380)

2026-06-16 16:39:23 +08:00

test_tp_rank_aware.py

[Core] hunyuan-image prefetch kv (#4448)

2026-06-25 21:31:49 +08:00