andyluo7 b9932aa17b [CI/Build][ROCm] Normalize SenseNova paged-decode hardware markers (#6935) ...

Signed-off-by: andyluo7 <andy.luo@amd.com>

2026-09-09 07:32:38 -07:00

..

test_sensenova_triton_kernel.py

[Perf]: Fused RMSNorm+3D Rope kernel in Sensenova-U1 (#4669)

2026-06-30 16:32:47 +08:00

test_sensenova_u1_attention_gqa.py

[Model] Support SenseNova-U1.5-8B-MoT and its distilled 8-step LoRA (#6516)

2026-09-01 22:53:53 +08:00

test_sensenova_u1_cfg.py

[Refactor][CI] Reorganize test tree, and move slow e2e to weekly (#4951)

2026-07-29 23:53:03 +08:00

test_sensenova_u1_distill_lora.py

[Model] Support SenseNova-U1.5-8B-MoT and its distilled 8-step LoRA (#6516)

2026-09-01 22:53:53 +08:00

test_sensenova_u1_logits_processor.py

[Bugfix | Model] Fix SenseNova & Use Well-defined Model Configs (#5877)

2026-08-18 16:43:05 +00:00

test_sensenova_u1_paged_decode.py

[CI/Build][ROCm] Normalize SenseNova paged-decode hardware markers (#6935)

2026-09-09 07:32:38 -07:00

test_sensenova_u1_rmsnorm.py

[Model] Support SenseNova-U1.5-8B-MoT and its distilled 8-step LoRA (#6516)

2026-09-01 22:53:53 +08:00