dongbo910220andDidan Deng 50bd1961bf [Feature]: add Ulysses advanced_uaa mode (#1379) ...

Signed-off-by: dongbo910220 <1275604947@qq.com>
Signed-off-by: dongbo910220 <32610838+dongbo910220@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>

2026-03-24 14:55:54 +08:00

..

test_cfg_parallel.py

[Perf]: CFG parallel abstraction (#851)

2026-01-30 16:23:44 +00:00

test_comm.py

[Hardware] Support platforms and plugin system (#774)

2026-01-28 22:12:52 +08:00

test_distributed_vae_executor.py

[Entrypoint][Refactor] vLLM-Omni Entrypoint Refactoring (#1908)

2026-03-18 17:33:53 +08:00

test_hsdp.py

[CI]: Add core_model and cpu markers for L1 use case. (#1709)

2026-03-10 17:39:37 +08:00

test_parallel_state_sp_groups.py

[CI]: Add core_model and cpu markers for L1 use case. (#1709)

2026-03-10 17:39:37 +08:00

test_sp_plan_hooks.py

[Feature]: add Ulysses advanced_uaa mode (#1379)

2026-03-24 14:55:54 +08:00

test_ulysses_uaa_perf.py

[Feature]: add Ulysses advanced_uaa mode (#1379)

2026-03-24 14:55:54 +08:00

test_vae_patch_parallel.py

[CI]: Add core_model and cpu markers for L1 use case. (#1709)

2026-03-10 17:39:37 +08:00