tzhouamandClaude Opus 5
3dac97e0bd
Four changes, each measured on a Xeon 8480C with Spark-X2.5-1.7B at 24 threads. Numbers are best-of-interleaved-passes; this host is shared and a single sequential grid swung the llama.cpp control 30%, so anything under ~8% is not treated as a result. **vLLM's CPU backend does have a 4-bit kernel.** An earlier note in this tree said it did not, on the strength of `woq_int4_linear`, `int4_scaled_mm_with_quant` and `da8w4_linear` all being absent. Those are simply not the names it uses: `CPUWNA16LinearKernel` dispatches GPTQ/AWQ checkpoints to `int4_scaled_mm_cpu`, an AMX W4A8 GEMM, whenever activations are bf16 and the checkpoint carries no act-order. Four-bit weights times eight-bit activations is the arithmetic llama.cpp's Q4_K_M already does. `gptq_cpu_export` builds checkpoints for it; the kernel pins the zero point at 8, so the grid must be symmetric, and a per-group scale search recovers most of what that costs. **A per-device weight path** (`edge/weight_path.py`). The fast kernel on each device needs a different, mutually exclusive weight layout, so the choice has to come from a probe rather than a flag: AMX x86 -> W4A8/GPTQ; x86 without AMX, or priority="fidelity" -> W4A16/tinygemm (bf16 activations, the more faithful of the two); ARM -> W4A16 but flagged unverified, because PyTorch's 4-bit CPU GEMM dispatches a different kernel there than the AVX-512 one measured here; phone -> runs_in_vllm=False, the deliverable is an exported graph with calibrated w8a16. **The CPU compile cache never loaded.** `_try_load_aot_compiled_fn` finishes with `compiled_fn.finalize_loading(cfg)`, which the CUDA wrapper object has and the inductor CPU backend's plain function does not. The AttributeError was swallowed as a cache miss, so every engine start recompiled the model: warm start 49.8 s against 14.9 s with the missing no-op attached. Self- disabling if upstream gives the CPU path a real one. **The head gate stops being a GEMM.** A 2048x8 projection cannot amortize a thread fan-out: dispatched as `aten::mm` it costs 1.155 ms of a decode step, nearly all barrier. As an eager reduction behind an opaque op it costs 0.444 ms. It has to be opaque -- written inline the reduction is traced, and inductor's loop made the whole step 1.8x slower (78.8 -> 44.5 tok/s). Also included and *off by default*: `cpu_ir_ops` registers the fused `_C::rms_norm` / `_C::fused_add_rms_norm` kernels that vLLM's CPU build ships but gates on `GPGPU_DEVICE`. In isolation they are 3.6x and 4.5x faster than the native path; end to end they are slightly slower (72.7 vs 74.0 tok/s), because inductor was already fusing the native norm into its neighbours and an opaque call breaks that fusion. Kept with the measurement recorded so the next person does not repeat it. `gelu_and_mul` is deliberately not registered: its fused CPU kernel is 2.7x slower at Spark's GEGLU shape. Decode, W4A16 g64 -> W4A8 g128 with the gate fix: 69.1 -> 84.5 tok/s (+22%), against llama.cpp Q4_K_M's 90.0; prefill 3347 against 1121 (3.0x). The two 4-bit paths are not equally faithful: against each build's own bf16 over 12 greedy prompts, Q4_K_M reproduces 4/12, W4A16 2/12 and W4A8 1/12. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
89 lines
3.2 KiB
Python
89 lines
3.2 KiB
Python
# SPDX-License-Identifier: Apache-2.0
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# SPDX-FileCopyrightText: Copyright contributors to the vLLM-Omni project
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"""The per-device weight/kernel selector."""
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import pytest
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from vllm_omni.edge.hardware_probe import HardwareProfile
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from vllm_omni.edge.weight_path import has_amx, select_weight_path
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pytestmark = [pytest.mark.core_model, pytest.mark.cpu]
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def _x86(*, amx: bool = True, **kw) -> HardwareProfile:
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flags = ["avx2", "avx512f"] + (["amx_tile", "amx_bf16"] if amx else [])
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return HardwareProfile(
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arch="x86_64", cpu_flags=flags, n_physical=32, n_logical=64,
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ram_total_bytes=64 << 30, ram_available_bytes=48 << 30,
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supports_bf16=True, **kw,
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)
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def test_amx_x86_takes_the_vllm_int4_kernel():
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path = select_weight_path(_x86(amx=True))
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assert path.name == "w4a8-amx"
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assert path.quantization == "gptq"
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assert path.runs_in_vllm and path.verified
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assert path.as_engine_kwargs() == {"quantization": "gptq"}
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def test_x86_without_amx_falls_back_to_bf16_activations():
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"""No AMX means no int4_scaled_mm_cpu, so tinygemm is the only 4-bit path."""
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path = select_weight_path(_x86(amx=False))
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assert path.name == "w4a16-tinygemm"
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assert path.quantization == "cpu_int4"
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def test_fidelity_priority_gives_up_the_amx_kernel():
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"""W4A8 quantizes activations to int8; asking for fidelity must not."""
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fast = select_weight_path(_x86(amx=True), priority="speed")
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faithful = select_weight_path(_x86(amx=True), priority="fidelity")
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assert fast.name == "w4a8-amx"
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assert faithful.name == "w4a16-tinygemm"
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def test_phone_does_not_run_in_vllm_at_all():
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profile = HardwareProfile(arch="aarch64", accelerator="npu:qualcomm", n_physical=8)
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path = select_weight_path(profile)
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assert path.runs_in_vllm is False
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assert path.as_engine_kwargs() == {}
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assert path.build_with and "export" in path.build_with
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# The calibration lesson has to travel with the recommendation.
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assert any("calibrat" in n.lower() for n in path.notes)
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def test_gpu_keeps_the_model_dtype():
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profile = HardwareProfile(
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arch="x86_64", accelerator="cuda_discrete", gpu_mem_bytes=80 << 30,
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supports_bf16=True, n_physical=32,
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)
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path = select_weight_path(profile)
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assert path.name == "bf16"
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assert path.quantization is None
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assert path.fused_cpu_norms is False
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def test_arm_cpu_is_offered_but_flagged_unverified():
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"""The 4-bit CPU GEMM has an ARM path, but a different kernel than the one
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measured here, so the selector must not claim it was."""
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profile = HardwareProfile(arch="aarch64", cpu_flags=["neon"], n_physical=8)
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path = select_weight_path(profile)
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assert path.quantization == "cpu_int4"
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assert path.verified is False
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def test_has_amx_needs_x86_and_the_tile_flag():
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assert has_amx(_x86(amx=True))
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assert not has_amx(_x86(amx=False))
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assert not has_amx(HardwareProfile(arch="aarch64", cpu_flags=["amx_tile"]))
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def test_every_path_states_why():
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for profile in (
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_x86(amx=True), _x86(amx=False),
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HardwareProfile(arch="aarch64", accelerator="npu:qualcomm"),
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HardwareProfile(arch="x86_64", accelerator="cuda_discrete"),
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):
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path = select_weight_path(profile)
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assert len(path.rationale) > 40, path.name
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