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anodyine/vllm-omni
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Code Issues 4 Pull Requests 2 Actions Packages Projects Releases Wiki Activity
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a8cec43ce6fbe91cbfc4eab4fe0e688358bcbad1
vllm-omni/vllm_omni/distributed/omni_connectors
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NATURE 1589931fa6 [Feature] vLLM-Omni RDMA connector (#1019)
Signed-off-by: natureofnature <wzliu@connect.hku.hk>
2026-02-24 11:13:52 +08:00
..
connectors
[Feature] vLLM-Omni RDMA connector (#1019)
2026-02-24 11:13:52 +08:00
transfer_adapter
[Feature] : Support disaggregated inference pipeline for Qwen3_TTS (#1161)
2026-02-21 07:36:44 +08:00
utils
[Feature] vLLM-Omni RDMA connector (#1019)
2026-02-24 11:13:52 +08:00
__init__.py
[Feature] vLLM-Omni RDMA connector (#1019)
2026-02-24 11:13:52 +08:00
adapter.py
[Feature]async scheduling to overlap chunk IO and compute (#951)
2026-02-12 16:05:02 +08:00
factory.py
[Feature] vLLM-Omni RDMA connector (#1019)
2026-02-24 11:13:52 +08:00
kv_transfer_manager.py
[Core]: KV Cache Transfer Encapsulation (#979)
2026-01-28 23:12:45 +08:00
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