Mu GuanLin 39e83e27f0 [Bug][CI] Pin the LTX FP8 quality gate to its established sigma schedule (#5302) ...

Signed-off-by: mglyn <1203789601@qq.com>

2026-07-22 14:36:32 +08:00

..

test_ltx2_conditioning.py

[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)

2026-07-20 20:02:30 +08:00

test_ltx2_latents.py

[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)

2026-07-20 20:02:30 +08:00

test_ltx2_parallel.py

[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)

2026-07-20 20:02:30 +08:00

test_ltx2_pipeline.py

[Bug][CI] Pin the LTX FP8 quality gate to its established sigma schedule (#5302)

2026-07-22 14:36:32 +08:00

test_ltx2_transformer.py

[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)

2026-07-20 20:02:30 +08:00

test_ltx2_vae.py

[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)

2026-07-20 20:02:30 +08:00