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anodyine/vllm-omni
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Code Issues 4 Pull Requests 2 Actions Packages Projects Releases Wiki Activity
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8d83fb59e9f635b778eaa93041f8d6fd84a2a17c
vllm-omni/docs/design/feature/omni_connectors
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yangsonglin13 1c530d984d Yuanrong TransferEngine Connector for NPU (#3180)
Signed-off-by: yangsonglin13 <yangsonglin566@gmail.com>
2026-05-20 14:51:33 +08:00
..
mooncake_store_connector.md
[skip CI][Docs] add connector design document (#1737)
2026-03-13 09:23:32 +08:00
mooncake_transfer_engine_connector.md
[Feature] Port Bagel RDMA flow to latest main (#2000)
2026-04-08 14:55:35 +08:00
shared_memory_connector.md
[skip CI][Docs] add connector design document (#1737)
2026-03-13 09:23:32 +08:00
yuanrong_connector.md
[skip CI][Docs] add connector design document (#1737)
2026-03-13 09:23:32 +08:00
yuanrong_transfer_engine_connector.md
Yuanrong TransferEngine Connector for NPU (#3180)
2026-05-20 14:51:33 +08:00
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