Hongsheng Liu 729ccd7f11 [Core] Add explicit HWR registration bypass and progress logs ...

Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>

2026-09-06 17:06:41 +08:00

..

composable_parallel

[Config] Return VllmOmniConfig from create_from_model (#4818)

2026-07-18 09:21:07 +00:00

__init__.py

[Config Refactor 2.5/N] Centralize pipeline registry (#2915)

2026-04-20 01:18:03 +08:00

test_config_factory.py

[CI][ROCm] Fix deterministic AMD L3 blockers (#6884)

2026-09-01 22:53:00 +08:00

test_config_import_cycle.py

[Perf][NPU] Enable native GQA & fused AddNorm for MiniMax-H3 encoder (#6040)

2026-08-26 09:14:05 +08:00

test_endpoint_policy.py

[Core / Bugfix] Add Mechanism for Endpoint Rejection (#4762)

2026-07-08 09:00:47 -06:00

test_environment_variables.py

[Model] Add native MAGI-2 Preview diffusion support (#5918)

2026-09-05 15:32:30 +08:00

test_forced_aligner_injection.py

[Feature] timestamps for TTS via a forced-aligner pooling (#4795)

2026-08-12 05:33:34 +00:00

test_omni_config.py

[Core] Add explicit HWR registration bypass and progress logs

2026-09-06 17:06:41 +08:00

test_pipeline_registry.py

[Core] Validate PipelineConfig in __post_init__ (#6829)

2026-09-01 11:17:57 +08:00

test_server_settings.py

[Frontend] Configurable video storage backends with TTL (#2531)

2026-06-19 17:41:22 -06:00