XiongZhongwei 40dcfdbb43 [Perf][NPU] Enable native GQA & fused AddNorm for MiniMax-H3 encoder (#6040) ...

Signed-off-by: MarkPoloChina <1228479724@qq.com>
Signed-off-by: XiongZhongwei <1228479724@qq.com>

2026-08-26 09:14:05 +08:00

..

mot

[Enhancement] Introduce High-Performance MoT (Mixture-of-Tokens) Kernels: Triton Implementation (#3960)

2026-06-16 03:08:02 +00:00

__init__.py

[Diffusion] Qwen image support (#82)

2025-11-28 14:22:11 +08:00

activation.py

[MUSA] Fix SwiGLU to use fused op (#6364)

2026-08-20 14:19:14 +08:00

adalayernorm.py

[PERF] Wan2.2 support rmsnorm fused op (#2583)

2026-04-16 03:21:34 -07:00

custom_op.py

[Feat] Add MUSA platform support for Moore Threads GPUs (#2337)

2026-04-01 17:55:00 +08:00

fourier.py

[Diffusion] [Model] Support AudioX (#2077)

2026-05-04 10:24:35 -04:00

fused_moe.py

[Rebase] Rebase to vllm 0.27.0 (#5976)

2026-08-11 15:23:46 +00:00

fused_qk_norm_rope.py

[Kernel] Fuse Q/K RMSNorm and RoPE (#5990)

2026-08-14 00:46:59 +00:00

norm.py

[Perf][NPU] Enable native GQA & fused AddNorm for MiniMax-H3 encoder (#6040)

2026-08-26 09:14:05 +08:00

rope.py

[BugFix][NPU] Wan2.2-S2V RoPE: replace complex64 advanced indexing with index_select (#6320)

2026-08-19 00:06:29 +08:00