Logo
Explore Help
Sign In
anodyine/vllm-omni
Watch 1
Star 0 Fork 0
Code Issues 4 Pull Requests 2 Actions Packages Projects Releases Wiki Activity
Files
044240d8ebeae9c19a7be01db9d37a1cd1a57c8a
vllm-omni/vllm_omni/distributed/omni_connectors/transfer_adapter
T
History
Megha AgarwalCopilotHongsheng Liumeghaagr13Boao ShiTaichang ZhouCursor
8f869c8ea5 [Refactor] Output Processor Phase 2: separate multimodal output channel (#1601) (#2744)
Signed-off-by: Megha Agarwal <agarwalmegha1308@gmail.com>
Signed-off-by: meghaagr13 <divyanshsinghvi@gmail.com>
Signed-off-by: Taichang Zhou <tzhouam@connect.ust.hk>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: meghaagr13 <divyanshsinghvi@gmail.com>
Co-authored-by: Boao Shi <aoibosh@connect.hku.hk>
Co-authored-by: Taichang Zhou <tzhouam@connect.ust.hk>
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-12 15:19:14 +08:00
..
__init__.py
[Feature]async scheduling to overlap chunk IO and compute (#951)
2026-02-12 16:05:02 +08:00
base.py
[Bugfix][Chunk Transfer Adapter] deque mutated fix (#2102)
2026-03-23 13:09:04 -04:00
chunk_transfer_adapter.py
[Refactor] Output Processor Phase 2: separate multimodal output channel (#1601) (#2744)
2026-06-12 15:19:14 +08:00
Powered by Gitea Version: 28.1.0 Page: 48ms Template: 1ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API