Sy03
|
e1303e5067
|
[Model] Optimize Qwen3-TTS streaming throughput and first audio on CUDA (#8163)
Signed-off-by: Sy03 <1370724210@qq.com>
|
2026-09-26 22:51:04 +08:00 |
|
 
|
0c7042d0d5
|
[Feature][Diffusion] Add BOOGU Image sequence parallel support (#5718)
Signed-off-by: Xenoryn <timberh2000@outlook.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-09-25 16:18:23 +08:00 |
|
Zeng Chuang
|
24b21278c0
|
[CI/Build][NPU] Run HunyuanVideo-1.5 perf step via run_benchmark.py (#8107)
Signed-off-by: zengchuang <zengchuang3@huawei.com>
|
2026-09-24 07:36:19 -07:00 |
|
 
|
98e123f3e0
|
[CI/Build][NPU] Add E2E test on Ascend A3 (#7775)
Signed-off-by: DarkMatter9527 <1376576122@qq.com>
Signed-off-by: DarkMatter <1376576122@qq.com>
Co-authored-by: Weiming Liao <fayespica@outlook.com>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
|
2026-09-24 14:10:04 +08:00 |
|
 wangyuandCursor
|
3d43571b94
|
[CI/Build] Cut L3 entrypoint BAGEL cold starts via L4 small-model sleep suites (#6851) (#7359)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-09-23 22:06:58 -07:00 |
|
 
|
db82a55162
|
[CI][NPU] Onboard Qwen-Image perf to Ascend A3 nightly (#7970)
Signed-off-by: NumberWan <wantszkin2003@gmail.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
|
2026-09-24 04:04:53 +00:00 |
|
 
|
a473ae78c3
|
[Bugfix][HunyuanImage3] Fix DiT LoRA binding: namespace alias + GQA QKV de-interleave (#6802)
Signed-off-by: Asthenia <asthenia0412@gmail.com>
Signed-off-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Asthenia <asthenia0412@gmail.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
|
2026-09-23 16:06:54 +00:00 |
|
RyanYun09
|
732d6085be
|
[CI][Omni-DuplexEval] Add nightly scoring CI guard (#7773)
Signed-off-by: RyanYun09 <318555231+RyanYun09@users.noreply.github.com>
|
2026-09-23 14:48:10 +00:00 |
|
wangyu
|
75570ee3a6
|
[CI/Build] Move Breeze-TTS-2 voice design e2e to weekly (#8032)
Signed-off-by: wangyu <410167048@qq.com>
|
2026-09-23 10:46:23 +08:00 |
|
Yueqian Lin
|
3f473a358b
|
[Model] Accelerate Breeze-TTS-2 non-streaming inference (#7752)
|
2026-09-22 17:10:15 -07:00 |
|
 
|
59db6a4285
|
[Rebase] Rebase to vLLM 0.30.0 (#7820)
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
|
2026-09-22 15:52:01 +00:00 |
|
vOv
|
939e6ba56e
|
[CI/Build] Give diffusion CPU tests more timeout headroom (#7983)
Signed-off-by: cr-gao <gaochenrui@sjtu.edu.cn>
|
2026-09-22 15:47:00 +08:00 |
|
wangyu
|
0570b0da7e
|
[CI][Perf] migrate diffusion DFX benches to vllm bench serve --omni (#7737)
Signed-off-by: wangyu <410167048@qq.com>
|
2026-09-21 19:16:39 -07:00 |
|
andyluo7
|
1586c41ae4
|
[CI][ROCm] Shorten the blocking CosyVoice test path (#7748)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-21 18:34:40 -07:00 |
|
 0z5aand0z5a
|
8bc0c38b90
|
[Bugfix] Add opt-in MiniCPM-o 4.5 Stage-0 sliding window (#7631)
Signed-off-by: 0z5a <dezhen.lu@student.uni-tuebingen.de>
Signed-off-by: 0z5a <dezhen.lu@uni-tuebingen.de>
Co-authored-by: 0z5a <dezhen.lu@uni-tuebingen.de>
|
2026-09-21 18:34:22 -07:00 |
|
wangyu
|
ef644b6112
|
[CI/Build] Promote LingBot-Video dense smoke to ready/merge and wire L4 expansion (#7892)
Signed-off-by: wangyu <410167048@qq.com>
|
2026-09-21 07:45:32 -07:00 |
|
Sy03
|
a9e2117f5e
|
[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (#7781)
Signed-off-by: Sy03 <1370724210@qq.com>
|
2026-09-20 23:03:08 -07:00 |
|
andyluo7
|
fa422a3f44
|
[CI/Build][ROCm] Cache AMD test images in registry (#7712)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-20 09:51:14 +08:00 |
|
Zeng Chuang
|
eb2075981d
|
[Test][Ascend] Share HunyuanVideo-1.5 E2E across GPU and NPU (#7547)
Signed-off-by: zengchuang <zengchuang3@huawei.com>
|
2026-09-18 08:49:08 +00:00 |
|
WeiQing Chen
|
5d3e6dc1b4
|
[Bugfix][MiniMax-H3] Use Hopper-safe modulation precision (#7693)
Signed-off-by: david6666666 <530634352@qq.com>
|
2026-09-18 15:16:45 +08:00 |
|
 
|
1c7476ec19
|
[CI/Build][ROCm] Stabilize shared AMD test lanes (#7706)
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: haic0 <haic0@users.noreply.github.com>
Co-authored-by: haic0 <haic0@users.noreply.github.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-09-18 11:13:07 +08:00 |
|
Chenchao Xu
|
d0755b5716
|
[Model] Add π0.5 (Pi0.5) VLA model support (#6950)
Signed-off-by: chenchaox <chenchaox@nvidia.com>
|
2026-09-17 05:18:51 -07:00 |
|
psv666
|
e3be42e052
|
[Core] Give the OpenAI Realtime wire codec a reusable home (RFC #6592 P0a) (#7640)
Signed-off-by: psv666 <2693925048@qq.com>
|
2026-09-17 02:33:40 -07:00 |
|
 chickeytonandClaude Opus 5
|
99ff4f3070
|
[Core][Frontend] Unified Full-duplex Framework (#7413)
Signed-off-by: chickeyton <ngton2014@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-09-16 15:35:36 +08:00 |
|
andyluo7
|
bbf77cce69
|
[CI][ROCm] Add non-blocking entrypoint GPU coverage (#7398)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-16 07:25:56 +08:00 |
|
 Mengjie ZhaoandCursor
|
c17126c219
|
[Model] Add Gepard-1.0 OpenAI /v1/audio/speech serving (#7499)
Signed-off-by: Mengjie Zhao <zmj0129@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-09-15 14:56:51 -07:00 |
|
andyluo7
|
92715f3f7b
|
[CI][ROCm] Add non-blocking engine and model executor GPU coverage (#7397)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-15 13:24:34 +08:00 |
|
 
|
64903b8e30
|
[CI/Build] Share nightly CUDA YAML between H100/L4 and B200 (#7028)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] [Your Email]
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
|
2026-09-14 14:27:10 +08:00 |
|
andyluo7
|
58adeec05f
|
[CI/Build] Add experimental AMD MI300 nightly lane (#6978)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-14 12:02:28 +08:00 |
|
Joshna-Medisetty
|
6fcab74aa9
|
[XPU][Docker] Align XPU image and CI with vLLM v0.29.0 (#7441)
Signed-off-by: Joshna-Medisetty <joshna.medisetty@intel.com>
|
2026-09-11 15:54:28 -05:00 |
|
wangyu
|
627630d7e4
|
[BugFix][CI] Restore diff-aware source filtering for post-merge L3 (#7371)
Signed-off-by: wangyu <410167048@qq.com>
|
2026-09-10 16:11:27 +00:00 |
|
 
|
a2486dd00b
|
[Core][Diffusion] Add a typed pre-D2H video media contract (#6615)
Signed-off-by: NancyFyong <NancyFyong@users.noreply.github.com>
Signed-off-by: Samit <285365963@qq.com>
Co-authored-by: NancyFyong <NancyFyong@users.noreply.github.com>
Co-authored-by: Samit <285365963@qq.com>
|
2026-09-10 09:50:54 +00:00 |
|
 wangyuandCursor
|
5b927b7ceb
|
[CI/Build] Diff-aware source_file_dependencies for CUDA/NPU pipelines (#6597)
Signed-off-by: wangyu <410167048@qq.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-09-10 01:40:01 -07:00 |
|
 Zhou TaichangandClaude Opus 5
|
aff7d64948
|
[Rebase] Rebase to vLLM 0.29.0 (#7230)
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Zhou Taichang <tzhouam@connect.ust.hk>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-09-10 12:08:28 +08:00 |
|
Sy03
|
333f14e97e
|
[Bugfix][MiniCPM-o] Align structured chat content with native omni rendering (#7344)
Signed-off-by: Sy03 <1370724210@qq.com>
|
2026-09-10 11:38:11 +08:00 |
|
 Weiming Liaoandwangyu
|
35a83a0885
|
[NPU][CI] Add A5 and 310P CI support (#6875)
Signed-off-by: Weiming Liao <liaowm5@gmail.com>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
|
2026-09-10 02:16:14 +00:00 |
|
Sy03
|
b02862beee
|
[Model] Optimize MOSS-TTS Local batched execution and streaming codec (#7202)
Signed-off-by: Sy03 <1370724210@qq.com>
|
2026-09-09 13:02:12 -07:00 |
|
 andyluo7andHongsheng Liu
|
c94cf4ddde
|
[CI][ROCm] Match CUDA/NPU L2/L3 label routing (#6966)
Signed-off-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-09-09 13:47:15 +00:00 |
|
 Lei KeandKrystalRay
|
5e4baea64d
|
[Bugfix][NPU] Limit MiniMax H3 modulation grid size (#6794)
Signed-off-by: KrystalRay <keeleiray@gmail.com>
Co-authored-by: KrystalRay <keeleiray@gmail.com>
|
2026-09-08 09:08:46 -07:00 |
|
andyluo7
|
de1b0708bd
|
[CI][ROCm] Route LTX2 Ulysses parity to two-GPU lane (#7234)
Signed-off-by: andyluo7 <andy.luo@amd.com>
|
2026-09-08 22:59:37 +08:00 |
|
 Lei KeandKrystalRay
|
7be014bce6
|
[Bugfix][NPU] Fix MiniMax-H3 INT8 quantization dispatch (#6876)
Signed-off-by: KrystalRay <keeleiray@gmail.com>
Co-authored-by: KrystalRay <keeleiray@gmail.com>
|
2026-09-07 14:50:44 +00:00 |
|
 linzhenpl07andClaude Sonnet 5
|
38abc0ba28
|
[AR-Diffusion] Allocate K and V separately so the compiled path stops cloning the pool (#6463)
Signed-off-by: linzhenpl07 <linzhenpl07@gmail.com>
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
|
2026-09-07 11:40:20 +08:00 |
|
Xiaobaixia
|
615f97b9c7
|
[Feature] Define the runner preprocess phase contract and regression coverage (#7136)
Signed-off-by: xiaobaixia222 <289982752@qq.com>
|
2026-09-06 17:20:04 +00:00 |
|
 
|
5d7fdf9350
|
[Core] Graduate MiniCPM-o 4.5 and PersonaPlex full-duplex serving out of experimental (#6196)
Signed-off-by: chickeyton <ngton2014@gmail.com>
Signed-off-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
|
2026-09-05 08:20:21 +00:00 |
|
Hongsheng Liu
|
d4096e01fe
|
[Model] Add native MAGI-2 Preview diffusion support (#5918)
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Signed-off-by: hsliuustc0106 <liuhongsheng4@huawei.com>
|
2026-09-05 15:32:30 +08:00 |
|
 akshatvishuandandyluo7
|
ae57e406fd
|
[Perf][CI] Use Whisper on GPU when memory permits (#5675)
Signed-off-by: akshatvishu <akshatnayak197@gmail.com>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: andyluo7 <andy.luo@amd.com>
|
2026-09-04 16:35:48 -07:00 |
|
 SYLARandhsliuustc0106
|
7493cbd3c2
|
[Bugfix] Fix Qwen3-Omni MoE backend selection (#7019)
Signed-off-by: hsliuustc0106 <liuhongsheng4@huawei.com>
Co-authored-by: hsliuustc0106 <liuhongsheng4@huawei.com>
|
2026-09-04 21:16:58 +08:00 |
|
hurukawa
|
8f284b343a
|
[Feature][Diffusion]: CFG parallelism support for Boogu-Image (#6786)
Signed-off-by: nagisa <1434936049@qq.com>
Signed-off-by: nagisa-kun <1434936049@qq.com>
|
2026-09-03 10:37:21 +08:00 |
|
  
|
95a9311696
|
[CI] Select mirror_hardwares presets via MIRROR_HW (H100/B200) (#5543)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Signed-off-by: [Your Name] <your.email@example.com>
Signed-off-by: wangyu <53896905+yenuo26@users.noreply.github.com>
Signed-off-by: Bo Li <22713281+bobboli@users.noreply.github.com>
Co-authored-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Bo Li <22713281+bobboli@users.noreply.github.com>
|
2026-09-02 15:39:49 +00:00 |
|
 wangyuandamy-why-3459
|
b6e72f3879
|
[CI] Migrate L4 jobs to l4-k8s and split by GPU count (#6890)
Signed-off-by: wangyu <410167048@qq.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
|
2026-09-02 17:09:59 +08:00 |
|