 Mu GuanLin
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3204a0b2ad
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[Model][Perf] Optimize LTX Ulysses sequence parallelism (#7079)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-09-07 10:48:26 +00:00 |
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SYLAR
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ce6ab0ca46
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[Model] Add LTX-2.5 support (#6070)
Signed-off-by: lishunyang12 <lishunyang12@163.com>
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2026-08-15 18:27:23 +08:00 |
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Mu GuanLin
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83d1f11449
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[Feat] LTX Standard Two-Stage Pipeline (#5500)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-08-14 00:13:14 +08:00 |
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Mu GuanLin
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1b718f7b15
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[Feat] [CI] [bugfix] Generalize LTX CFG parallelism to the complete guidance plan (#5547)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-07-29 17:40:40 +00:00 |
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Mu GuanLin
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12d75cf63a
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[Feature] Add official LTX multimodal guidance and precision guard (#5148)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-07-28 10:44:25 +00:00 |
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Mu GuanLin
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39e83e27f0
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[Bug][CI] Pin the LTX FP8 quality gate to its established sigma schedule (#5302)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-07-22 14:36:32 +08:00 |
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Mu GuanLin
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a06664a243
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[Refactor] Unify the LTX-2 and LTX-2.3 pipeline runtime (#5147)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-07-20 20:02:30 +08:00 |
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