 Dong WandHongsheng Liu
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c1ebb60747
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[Bugfix]Fix Qwen 2.5 omni hardcoded max_mel_frames to resolve shape mismatch (#543)
Signed-off-by: Dong Wang <dongw2019@gmail.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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2026-01-01 17:12:03 +13:00 |
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TJianandHongxia Yang
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13584fd98e
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[ROCm] [CI] Add ROCm Dockerfile and AMD CI (vllm v0.12.0) (#280)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: Hongxia Yang <hongxia.yang@amd.com>
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2025-12-21 11:51:37 +08:00 |
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8939eb835d
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[Rebase] Rebase to vllm 0.12.0 (#335)
Signed-off-by: Rein Yang <ruiruyang2@gmail.com>
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Rein Yang <ruiruyang2@gmail.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-12-19 16:42:02 +08:00 |
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Canlin Guo
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2b6d8f17ba
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[NPU][CI] Add the CI workflow on NPU (#231)
Signed-off-by: gcanlin <canlinguosdu@gmail.com>
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2025-12-17 17:07:12 +08:00 |
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SamitandJiangyun Zhu
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2b4a9fe729
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[Diffusion] Add cache-dit and unify diffusion cache backend interface (#250)
Signed-off-by: samithuang <285365963@qq.com>
Signed-off-by: SamitHuang <285365963@qq.com>
Signed-off-by: Samit <285365963@qq.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2025-12-15 15:10:45 +08:00 |
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Alicia
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c32f52fcc0
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[CI] Adjust folder (#300)
Signed-off-by: Alicia Wang <115451386+congw729@users.noreply.github.com>
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2025-12-12 09:19:24 +00:00 |
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Jiangyun Zhu
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e1bec308a3
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[CI] Fix ci (#110)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
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2025-11-30 15:09:45 +08:00 |
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Roger WangandWANG Cong
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1ab88823d4
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Simple test from PR#88 on Buildkite (#93)
Signed-off-by: WANG Cong <115451386+congw729@users.noreply.github.com>
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored-by: WANG Cong <115451386+congw729@users.noreply.github.com>
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2025-11-28 13:05:07 -08:00 |
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