 Mu GuanLin
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d3c990dca8
|
[Model][Bugfix] Improve LTX audio parity and similarity guards (#6342)
Signed-off-by: mglyn <1203789601@qq.com>
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2026-08-26 20:59:10 +08:00 |
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Mu GuanLinandHongsheng Liu
|
59cf3add40
|
[Feature] Support MiniMax-H3 Turbo LoRA with DLO (#6550)
Signed-off-by: mglyn <1203789601@qq.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-26 16:15:47 +08:00 |
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wangyuandCursor
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aeb348d8f8
|
[CI]Remove DreamID-Omni and MagiHuman support (#6357)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-08-26 01:31:12 +00:00 |
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XiongZhongwei
|
40dcfdbb43
|
[Perf][NPU] Enable native GQA & fused AddNorm for MiniMax-H3 encoder (#6040)
Signed-off-by: MarkPoloChina <1228479724@qq.com>
Signed-off-by: XiongZhongwei <1228479724@qq.com>
|
2026-08-26 09:14:05 +08:00 |
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Hongsheng Liu
|
5a8b81ebeb
|
[Model] Optimize MiniMax-H3 DLO component lifecycle (#6526)
Signed-off-by: hsliuustc0106 <liuhongsheng4@huawei.com>
|
2026-08-25 23:13:41 +08:00 |
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Bo Li
|
51b7565f33
|
[perf] Add mask-free TRTLLM packed-padding path (#6542)
Signed-off-by: Bo Li <22713281+bobboli@users.noreply.github.com>
|
2026-08-25 07:45:21 +00:00 |
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leoandleo
|
50b8a150f9
|
[Model] Add native SANA-Video 2B T2V and I2V support (#5508)
Signed-off-by: leo <92263211+napleon-liu@users.noreply.github.com>
Signed-off-by: leo <92263211+liuyao0322@users.noreply.github.com>
Signed-off-by: liuyao0322 <yaoliu548926@gmail.com>
Co-authored-by: leo <92263211+napleon-liu@users.noreply.github.com>
|
2026-08-25 09:46:02 +08:00 |
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d150a4fde7
|
[Feature][MiniMax-H3] Support diffusion continuous batching (#5810)
Signed-off-by: princepride <wangzhipeng628@gmail.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
|
2026-08-24 21:08:53 +08:00 |
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bjf-frzandHongsheng Liu
|
072bfc02dd
|
[FEAT]Add FastVideo VSA backend for Wan2.2 (#4820)
Signed-off-by: bjf-frz <frz123db@gmail.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-24 14:48:31 +08:00 |
|
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Mu GuanLinandHongsheng Liu
|
3d035bfa19
|
[Feature] Support MiniMax-H3 Turbo LoRA with the legacy manager (#6476)
Signed-off-by: mglyn <1203789601@qq.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-24 06:21:42 +08:00 |
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Jerry Song
|
17285c2f55
|
[Feature] Add FP8 quantization for FLUX.2-dev (#3027)
Signed-off-by: Songrui625 <songrui625@gmail.com>
|
2026-08-23 04:31:34 +00:00 |
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wangyuandamy-why-3459
|
0db262de2a
|
[CI/Build] Move L1/E2E coverage to weekly and split scheduled L4/L5 pipelines (#6311)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
|
2026-08-23 11:49:37 +08:00 |
|
|
Wang fuyinandHongsheng Liu
|
72ee535fcd
|
[Diffusion] Add native paged KV backend for diffusion workers (#6102)
Signed-off-by: Acerak01-fy <wfy2003324@163.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-22 21:45:45 +08:00 |
|
|
R0CKSTAR
|
260db8bab5
|
[Bugfix][Diffusion] Fix MiniMax-H3 model-level CPU offload residency (#6072)
Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
|
2026-08-21 10:30:53 +00:00 |
|
|
Shin
|
70bdd49402
|
[Model] Add HiDream-O1-Image support (#5194)
Signed-off-by: yixiaoer <shin@yixiaoer.sg>
|
2026-08-21 14:15:37 +08:00 |
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MaciejBalaNVandRoger Wang
|
13c2de684c
|
Cosmos3 logging and prompt improvements (#6325)
Signed-off-by: Maciej Bala <mbala@nvidia.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
|
2026-08-20 12:04:49 -07:00 |
|
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MaciejBalaNV
|
b3270dec8d
|
Cosmos3 transfer fix (#5614)
Signed-off-by: Maciej Bala <mbala@nvidia.com>
|
2026-08-20 11:40:51 -07:00 |
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linzhenpl07andClaude Opus 5
|
38cf9adc38
|
[BugFix][Diffusion] Fix MiniMax-H3 VAE hang when decoder tiles are fewer than ranks (#6345)
Signed-off-by: linzhenpl07 <linzhenpl07@gmail.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
|
2026-08-20 12:42:14 +08:00 |
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BruceLoveDecimaland汪志鹏
|
adf6d0c1ea
|
[Model] Add SANA-WM support(Stage-1 only) (#4061)
Signed-off-by: BruceLoveDecimal <liuqihao970610@gmail.com>
Signed-off-by: 汪志鹏 <wangzhipeng628@gmail.com>
Signed-off-by: liuqihao <liuqihao970610@gmail.com>
Co-authored-by: 汪志鹏 <wangzhipeng628@gmail.com>
|
2026-08-18 23:57:55 -06:00 |
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Alex Brooks
|
b4b907e7b6
|
[Bugfix | Model] Fix SenseNova & Use Well-defined Model Configs (#5877)
Signed-off-by: Alex Brooks <albrooks@redhat.com>
|
2026-08-18 16:43:05 +00:00 |
|
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Yukim1andzwhzzz0821
|
0a1846aa45
|
[Diffusion] Add native KV cache initialization and Scheduler-managed block allocation (#6094)
Signed-off-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
Co-authored-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
|
2026-08-18 07:00:24 +00:00 |
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Yichen WangandDidan Deng
|
2a9f6aaa8e
|
Add π0 VLA model support (#4222)
Signed-off-by: Yichen Wang <yichen.wang@bytedance.com>
Signed-off-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
|
2026-08-17 14:29:17 +08:00 |
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|
Hongsheng Liu
|
9d2bb23ff6
|
[Diffusion] Add loader-owned host-weight plans for DLO (TP=1) (#6213)
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-16 11:02:38 +08:00 |
|
|
|
3875f8ded4
|
[Core] Add realtime AR-Diffusion tick sessions for LingBot World 2.0 (#5491)
Signed-off-by: zhangbin.327 <zhangbin.327@bytedance.com>
Signed-off-by: Jack47 <scsvip@gmail.com>
Co-authored-by: zhangbin.327 <zhangbin.327@bytedance.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-16 09:11:20 +08:00 |
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|
hurukawa
|
2a315e1a2d
|
[Perf] Support request-level batching for Wan2.2 pipelines (#5676)
Signed-off-by: nagisa-kun <1434936049@qq.com>
Signed-off-by: nagisa <1434936049@qq.com>
|
2026-08-15 23:58:36 +08:00 |
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SYLARandHongsheng Liu
|
d1e230c95b
|
[Diffusion][Quantization] Enable MiniMax-H3 global FP8 with DLO (#5910)
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-15 23:01:26 +08:00 |
|
|
SYLAR
|
ce6ab0ca46
|
[Model] Add LTX-2.5 support (#6070)
Signed-off-by: lishunyang12 <lishunyang12@163.com>
|
2026-08-15 18:27:23 +08:00 |
|
|
|
7b76b6446d
|
[Model][Performance] Optimize MiniMax-H3 strict Ulysses boundaries (#6173)
Signed-off-by: mokashliu <mokashliu@tencent.com>
Co-authored-by: mokashliu <mokashliu@tencent.com>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
|
2026-08-15 16:27:52 +08:00 |
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MrlixiangWE
|
b95c73742d
|
[Bugfix] Stop reading the removed OmniRequestOutput.request_output accessor (#6172)
Signed-off-by: MrlixiangWE <mrdanaer@gmail.com>
|
2026-08-15 07:07:28 +08:00 |
|
|
Wenjia Li
|
8ecd1f6d5c
|
[Perf][NPU] Fuse MiniMax H3 Qwen3-VL SwiGLU (#6167)
Signed-off-by: Wenjia Li <wjialish@gmail.com>
|
2026-08-14 11:47:17 +00:00 |
|
|
Wenjia Li
|
ffd11c181e
|
[Perf][NPU] Fuse MiniMax H3 Qwen3-VL RoPE (#6061)
Signed-off-by: Wenjia Li <wjialish@gmail.com>
|
2026-08-14 09:49:26 +00:00 |
|
|
R0CKSTAR
|
022d7a7695
|
[Perf][Diffusion] Avoid redundant MiniMax-H3 reference video scans (#6064)
Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
|
2026-08-14 15:49:26 +08:00 |
|
|
Mu GuanLin
|
83d1f11449
|
[Feat] LTX Standard Two-Stage Pipeline (#5500)
Signed-off-by: mglyn <1203789601@qq.com>
|
2026-08-14 00:13:14 +08:00 |
|
|
Wenjia LiandHongsheng Liu
|
38a2500bdf
|
[Perf] MiniMax H3 Qwen3-VL support fused RMSNorm on NPU (#5915)
Signed-off-by: Wenjia Li <wjialish@gmail.com>
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-12 19:12:54 +08:00 |
|
|
Zhou TaichangandClaude Opus 5
|
2ce15ab7a0
|
[Rebase] Rebase to vllm 0.27.0 (#5976)
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-11 15:23:46 +00:00 |
|
|
|
06e733d3cd
|
[Model] Add LongCat-Video-Avatar-1.5 ai2v, at2v support (#4099)
Signed-off-by: weiyan <weiyanlin117@gmail.com>
Signed-off-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-11 15:17:17 +08:00 |
|
|
Zijun HuangandWeiQing Chen
|
1a56953d7a
|
[NPU][Model] Add distilled 4-step sigma schedule support for MiniMax H3 t2va (#5991)
Signed-off-by: Zijun Huang <zijunhua@usc.edu>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
|
2026-08-11 13:46:10 +08:00 |
|
|
WeiQing Chen
|
1f65814fab
|
[CI] Align MiniMax H3 Ref2VA inputs and add I2VA/Ref2VA accuracy coverage (#5978)
Signed-off-by: david6666666 <530634352@qq.com>
|
2026-08-11 13:36:37 +08:00 |
|
|
ooooooye
|
740f45abcd
|
[Perf][Diffusion] MiniMax-H3: opt into packed varlen attention on NPU to eliminate quadratic mask materialization (#5891)
Signed-off-by: brandneway <gyuan4892@gmail.com>
|
2026-08-10 19:47:03 +08:00 |
|
|
R0CKSTAR
|
636d44e272
|
[Perf][MUSA] Restore MiniMax-H3 dynamic RoPE fusion (#5881)
Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
|
2026-08-10 17:24:46 +08:00 |
|
|
wtz2333andClaude
|
36135ef09a
|
[diffusion][feature] Add LingBot-Video T2I and TI2V generation modes (#5311)
Signed-off-by: wtz2333 <2955110911@qq.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-08-10 10:02:31 +08:00 |
|
|
|
6ae7ff7846
|
[Diffusion] Prepare HunyuanImage3 for Scheduler-managed paged KV cache (#5541)
Signed-off-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
Co-authored-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
|
2026-08-10 08:48:56 +08:00 |
|
|
Diya Pengandlishunyang12
|
45629a8e26
|
[MiniMax-H3] TeaCache support and Cache-DiT validation (#5840)
Signed-off-by: dpeng123 <diyapeng123@gmail.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: lishunyang12 <lishunyang12@163.com>
|
2026-08-09 15:07:21 +00:00 |
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linzhenpl07andClaude Opus 4.8
|
8e2e9b6b53
|
[Feat] Cosmos3 session-memory port for UND text K/V (RFC #4480 Phase 0) (#4657)
Signed-off-by: linzhenpl07 <linzhenpl07@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
|
2026-08-09 20:53:17 +08:00 |
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|
Shenglei FuandClaude Opus 5
|
81b48e83ec
|
[Model] Fail MiniMax H3 encoder load when a weight or fused shard is missing (#5824)
Signed-off-by: Shenglei Fu <sfu@confluent.io>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-08-08 13:14:00 +08:00 |
|
|
Mu GuanLin
|
d8c35663b4
|
[Model][Feat] Support Minimax-H3 quality grading requests through dynamic loading/unloading with Cache-DiT (#5853)
Signed-off-by: mglyn <1203789601@qq.com>
|
2026-08-07 09:07:23 +00:00 |
|
|
|
48298030d4
|
[Diffusion] Add Minimax-H3 modular pipeline support (#5720)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Signed-off-by: David Chen <530634352@qq.com>
Co-authored-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: SYLAR <125541396+lishunyang12@users.noreply.github.com>
Co-authored-by: David Chen <530634352@qq.com>
|
2026-08-06 11:43:23 +00:00 |
|
|
fan2956andFan
|
f2e3d2e25b
|
[Perf] Minimax-H3 support fused RMSNorm and RoPE opt (#5801)
Signed-off-by: Fan <fan@FandeMacBook-Air.local>
Co-authored-by: Fan <fan@FandeMacBook-Air.local>
|
2026-08-06 11:39:27 +08:00 |
|
|
Mu GuanLin
|
240e6655be
|
[CI][Bugfix] Fix Minimax-H3 FP8 Accuracy Test (#5829)
Signed-off-by: mglyn <1203789601@qq.com>
|
2026-08-06 03:27:01 +00:00 |
|
|
SYLARandlishunyang12
|
1c2a81f6d8
|
feat(minimax-h3): enable 2x RTX 4090/5090 with DLO (#5764)
Signed-off-by: lishunyang12 <lishunyang03@gmail.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: lishunyang12 <lishunyang03@gmail.com>
|
2026-08-06 09:02:29 +08:00 |
|