anodyine/vllm-omni
1
0 Fork 0
Code Issues 4 Pull Requests 2 Actions Packages Projects Releases Wiki Activity
2,623 Commits 235 Branches 31 Tags
75af33a76f1183c8a315bd2bab2f68e2b49a4fbe
Commit Graph
759 Commits
Author SHA1 Message Date
Hongsheng Liu 75af33a76f [Diffusion] Address DLO host cache review feedback 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:23:36 +08:00
Hongsheng Liu 44d3245a6d [Diffusion] Clear handled CUDA registration errors 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:23:36 +08:00
Hongsheng Liu 010b3c1d74 [Diffusion] Make no-AllGather host weight cache automatic 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:23:36 +08:00
Hongsheng Liu 3bb7547a0f [Diffusion] Rename runtime cache to host weight cache 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:23:36 +08:00
Hongsheng Liu 6b7b5368f2 [Diffusion] Clarify runtime cache module boundary 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:59 +08:00
Hongsheng Liu 6751c1f404 [Diffusion] Address runtime cache review feedback 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:59 +08:00
Hongsheng Liu c1196216a3 [Diffusion] Stabilize runtime cache identities 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:28 +08:00
Hongsheng Liu 23ab14a15b [Diffusion] Register runtime cache for direct DLO H2D 
Avoid recurrent mmap-to-pinned packing in no-AllGather DLO by registering transform-complete runtime-cache mappings under an explicit per-worker budget. Copy mapped tensors directly into the rotating device buffers while preserving bounded-staging fallback and ordered shutdown cleanup.

Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:28 +08:00
Hongsheng Liu 59549968cf [Diffusion] Tighten runtime cache compatibility guards 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:28 +08:00
Hongsheng Liu d30ccdc315 [Diffusion] Add node-local runtime weight cache for DLO 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-19 11:21:01 +08:00
Canlin Guo 14f2c16fb2 [Perf] Fuse MiniMax H3 modulation with FP32 accumulation (#6281) 
Signed-off-by: Canlin Guo <canlinguosdu@gmail.com>
 2026-08-18 20:13:54 -07:00
Canlin Guo 9683b7f4b4 [Perf] Fuse MiniMax H3 SwiGLU activation (#6283) 
Signed-off-by: Canlin Guo <canlinguosdu@gmail.com>
 2026-08-18 20:12:10 -07:00
Alex Brooks b4b907e7b6 [Bugfix | Model] Fix SenseNova & Use Well-defined Model Configs (#5877) 
Signed-off-by: Alex Brooks <albrooks@redhat.com>
 2026-08-18 16:43:05 +00:00
Weiming Liao f208f907bc [BugFix][NPU] Wan2.2-S2V RoPE: replace complex64 advanced indexing with index_select (#6320) 
Signed-off-by: Weiming Liao <liaowm5@gmail.com>
 2026-08-19 00:06:29 +08:00
Hongsheng Liu 284e05c88b [Core] Support online FP8 with DLO AllGather (#6279) 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-18 23:48:07 +08:00
Hongsheng Liu c3de04e127 [Bugfix] Avoid eager pi0 runtime import in pipeline registry (#6322) 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-18 23:42:03 +08:00
Joshna-MedisettyHongsheng LiuCursorNick Cao
 		4cd667875f [XPU][SDXL] Fix text encoder input device under CPU offload (#6125) 
Signed-off-by: Joshna Medisetty <joshna.medisetty@intel.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Nick Cao <ncao@redhat.com>
 2026-08-18 14:03:31 +00:00
TJian 02069a5bbf [ROCm] [CI] Fix circular import for rocm due to patch (#6287) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2026-08-18 09:45:05 +00:00
Yukim1andzwhzzz0821 0a1846aa45 [Diffusion] Add native KV cache initialization and Scheduler-managed block allocation (#6094) 
Signed-off-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
Co-authored-by: zwhzzz0821 <zwhzzz0821@users.noreply.github.com>
 2026-08-18 07:00:24 +00:00
TJian 170d498771 [ROCm] [CI] Fix cpu test on rocm (#6267) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2026-08-17 14:46:30 +08:00
Yichen WangandDidan Deng 2a9f6aaa8e Add π0 VLA model support (#4222) 
Signed-off-by: Yichen Wang <yichen.wang@bytedance.com>
Signed-off-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
 2026-08-17 14:29:17 +08:00
Hongsheng Liu 9d2bb23ff6 [Diffusion] Add loader-owned host-weight plans for DLO (TP=1) (#6213) 
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-16 11:02:38 +08:00
Jack Chenzhangbin.327Hongsheng Liu
 		3875f8ded4 [Core] Add realtime AR-Diffusion tick sessions for LingBot World 2.0 (#5491) 
Signed-off-by: zhangbin.327 <zhangbin.327@bytedance.com>
Signed-off-by: Jack47 <scsvip@gmail.com>
Co-authored-by: zhangbin.327 <zhangbin.327@bytedance.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-16 09:11:20 +08:00
Anurag 68bf8c2c42 [Bugfix] Prevent DiffusionResultPump crash on cancelled futures (#5793) (#5983) 
Signed-off-by: ANURAG KANADE <anuragkanade6@gmail.com>
 2026-08-15 16:19:45 +00:00
hurukawa 2a315e1a2d [Perf] Support request-level batching for Wan2.2 pipelines (#5676) 
Signed-off-by: nagisa-kun <1434936049@qq.com>
Signed-off-by: nagisa <1434936049@qq.com>
 2026-08-15 23:58:36 +08:00
SYLARandHongsheng Liu d1e230c95b [Diffusion][Quantization] Enable MiniMax-H3 global FP8 with DLO (#5910) 
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-15 23:01:26 +08:00
Samit 136cb27b05 [Bugfix] Fix lost async diffusion outputs in request-level batching (#6023) 
Signed-off-by: samithuang <285365963@qq.com>
 2026-08-15 18:27:51 +08:00
SYLAR ce6ab0ca46 [Model] Add LTX-2.5 support (#6070) 
Signed-off-by: lishunyang12 <lishunyang12@163.com>
 2026-08-15 18:27:23 +08:00
mokekemokashliuWeiQing Chen
 		7b76b6446d [Model][Performance] Optimize MiniMax-H3 strict Ulysses boundaries (#6173) 
Signed-off-by: mokashliu <mokashliu@tencent.com>
Co-authored-by: mokashliu <mokashliu@tencent.com>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
 2026-08-15 16:27:52 +08:00
hotTeajiangweifeng.devHongsheng Liu
 		a70d4d4b3c [codex] Fix diffusion worker timeout for large broadcast payloads (#4845) 
Signed-off-by: jiangweifeng.dev <jiangweifeng.dev@bytedance.com>
Co-authored-by: jiangweifeng.dev <jiangweifeng.dev@bytedance.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-15 16:03:04 +08:00
R0CKSTAR 728640f4d9 [Bugfix][MUSA][Qwen Image] Avoid complex RoPE alias guards (#6110) 
Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
 2026-08-14 15:51:23 +08:00
R0CKSTAR 022d7a7695 [Perf][Diffusion] Avoid redundant MiniMax-H3 reference video scans (#6064) 
Signed-off-by: Xiaodong Ye <xiaodong.ye@mthreads.com>
 2026-08-14 15:49:26 +08:00
baonudesifeizhai b300f66656 [Bugfix] Fix HSDP compatibility with the new online FP8 linear method (#5677) 
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
 2026-08-14 15:45:55 +08:00
zhengjiaandCursor 5d50bdc2ab [Perf] Cap diffusion worker thread count before spawn (#6165) 
Signed-off-by: zjli2013 <leezhengjiang@126.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-08-14 12:14:55 +08:00
Bo Lilishunyang12Claude Opus 5
 		596c16a550 [Kernel] Fuse Q/K RMSNorm and RoPE (#5990) 
Signed-off-by: Bo Li <22713281+bobboli@users.noreply.github.com>
Signed-off-by: lishunyang12 <lishunyang12@163.com>
Signed-off-by: Mengjie Zhao <zmj0129@gmail.com>
Co-authored-by: lishunyang12 <lishunyang12@163.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
 2026-08-14 00:46:59 +00:00
Mu GuanLin 83d1f11449 [Feat] LTX Standard Two-Stage Pipeline (#5500) 
Signed-off-by: mglyn <1203789601@qq.com>
 2026-08-14 00:13:14 +08:00
vraitiandClaude Opus 4.6 c98517ce7f [Metrics] Add Diffusion Metrics (#4755) 
Signed-off-by: vraiti <vraiti@redhat.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
 2026-08-13 06:59:13 +00:00
MaciejBalaNV e677360168 Add cosmos-guardrail dependency and update error message (#6107) 
Signed-off-by: Maciej Bala <mbala@nvidia.com>
 2026-08-12 17:04:07 +00:00
Shi Boao Bowie汪志鹏ruirui yangamy-why-3459Gao HanHongsheng Liu
 		fcf1085395 [Refactor][OutputProcessor 2/8]: OmniRequestOutput should inherit RequestOutput and no nested wrap-up (#5146) 
Signed-off-by: Boao Shi <aoibosh@connect.hku.hk>
Signed-off-by: bowieshi <aoibosh@connect.hku.hk>
Signed-off-by: princepride <wangzhipeng628@gmail.com>
Signed-off-by: R2-Y <ruiruyang2@gmail.com>
Signed-off-by: amy-why-3459 <wuhaiyan17@huawei.com>
Signed-off-by: Shi Boao Bowie <aoibosh@connect.hku.hk>
Co-authored-by: 汪志鹏 <wangzhipeng628@gmail.com>
Co-authored-by: ruirui(rein) yang <73573651+R2-Y@users.noreply.github.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-12 22:58:23 +08:00
Wenjia LiandHongsheng Liu 38a2500bdf [Perf] MiniMax H3 Qwen3-VL support fused RMSNorm on NPU (#5915) 
Signed-off-by: Wenjia Li <wjialish@gmail.com>
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-12 19:12:54 +08:00
Rahul SteigerandRahul Steiger 854bff7fe5 [Bugfix] Fix Wan spatial reshard boundary (#6062) 
Signed-off-by: Rahul Steiger <rsteiger@nvl72d106-T18.cm.cluster>
Co-authored-by: Rahul Steiger <rsteiger@nvl72d106-T18.cm.cluster>
 2026-08-12 11:36:24 +08:00
zzh bdb1d996be [Bugfix] Fix HunyuanImage3 accuracy test (#5981) 
Signed-off-by: zzh <943967662@qq.com>
 2026-08-12 02:40:05 +00:00
Zhou TaichangandClaude Opus 5 2ce15ab7a0 [Rebase] Rebase to vllm 0.27.0 (#5976) 
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
 2026-08-11 15:23:46 +00:00
Jerry Song 89015d5cad [Feature]: Adds distilled LoRA support for diffusion models (#2783) 
Signed-off-by: Songrui625 <songrui625@gmail.com>
 2026-08-11 14:23:43 +00:00
KristofferDidan DengHongsheng Liu
 		4ab1b4ff9c [Perf][Flux2][HunyuanVideo1.5] Skip attention-mask to avoid varlen path (#4645) 
Signed-off-by: kTorp <Kristoffer.Torp@amd.com>
Signed-off-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-11 15:31:02 +08:00
WeiyanDidan DengHongsheng Liu
 		06e733d3cd [Model] Add LongCat-Video-Avatar-1.5 ai2v, at2v support (#4099) 
Signed-off-by: weiyan <weiyanlin117@gmail.com>
Signed-off-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Didan Deng <33117903+wtomin@users.noreply.github.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-11 15:17:17 +08:00
Wang fuyinandHongsheng Liu af3faa6c1e [Diffusion] Add Worker contracts and RPC plumbing for Scheduler-managed paged KV cache (#5550) 
Signed-off-by: Acerak01-fy <wfy2003324@163.com>
Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
 2026-08-11 14:55:42 +08:00
Zijun HuangandWeiQing Chen 1a56953d7a [NPU][Model] Add distilled 4-step sigma schedule support for MiniMax H3 t2va (#5991) 
Signed-off-by: Zijun Huang <zijunhua@usc.edu>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
 2026-08-11 13:46:10 +08:00
WeiQing Chen 1f65814fab [CI] Align MiniMax H3 Ref2VA inputs and add I2VA/Ref2VA accuracy coverage (#5978) 
Signed-off-by: david6666666 <530634352@qq.com>
 2026-08-11 13:36:37 +08:00
fan2956andFan c27623c29c [Bugfix] rainfusion support all shape video (#6000) 
Signed-off-by: Fan <fan@FandeMacBook-Air.local>
Co-authored-by: Fan <fan@FandeMacBook-Air.local>
 2026-08-11 05:10:50 +08:00