 Zheng Wengangandamy-why-3459
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527982d886
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[Bugfix] Skip async-chunk SHM put for stage-0-final requests (#7245)
Signed-off-by: ZhengWG <zwg0606@gmail.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
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2026-10-02 09:14:39 -07:00 |
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Sy03
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e372aa3a41
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[Bugfix] Restore Fish Speech and CosyVoice3 audio quality at high concurrency (#8422)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-10-02 07:11:04 -07:00 |
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Sy03
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d93e1a8e09
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[Model] Optimize Qwen3-Omni MRv2 handoff, code prediction and audio decoding (#8223)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-10-01 22:22:54 -07:00 |
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andyluo7
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bbee488da3
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fix: repair ROCm test routing, CPU timeouts, and Breeze autotuning (#8342)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-10-02 07:36:41 +08:00 |
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汪志鹏
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a038b38179
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[Model] Add MiniMax-H3 latent super-resolution and hi-res refinement (#8322)
Signed-off-by: princepride <wangzhipeng628@gmail.com>
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2026-10-01 14:24:40 +08:00 |
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Sy03
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56763cd6c3
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[Model] Enable Higgs Audio v3 MRV2 streaming and fix mixed-prefill capture bounds (#8226)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-09-30 11:32:27 +00:00 |
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wangyuandAlicia
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d0f073686a
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[CI/Build] Split long weekly TTS jobs and route slow full-model cases to nightly (#8239)
Signed-off-by: wangyu <410167048@qq.com>
Co-authored-by: Alicia <115451386+congw729@users.noreply.github.com>
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2026-09-30 09:08:24 +00:00 |
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Sy03andzack
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1ea0ee3b38
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[Model] Add opt-in packed Flow and batched HiFT inference for CosyVoice3 (#8224)
Signed-off-by: Sy03 <1370724210@qq.com>
Signed-off-by: zack <huixindaddy@yahoo.com>
Co-authored-by: zack <huixindaddy@yahoo.com>
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2026-09-29 15:48:36 +00:00 |
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andyluo7andAlicia
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b63e35ab4f
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ci: extend AMD Z-Image cold-start timeout (#8195)
Signed-off-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: Alicia <115451386+congw729@users.noreply.github.com>
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2026-09-27 06:11:05 +00:00 |
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Sy03
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e1303e5067
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[Model] Optimize Qwen3-TTS streaming throughput and first audio on CUDA (#8163)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-09-26 22:51:04 +08:00 |
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0c7042d0d5
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[Feature][Diffusion] Add BOOGU Image sequence parallel support (#5718)
Signed-off-by: Xenoryn <timberh2000@outlook.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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2026-09-25 16:18:23 +08:00 |
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Zeng Chuang
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24b21278c0
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[CI/Build][NPU] Run HunyuanVideo-1.5 perf step via run_benchmark.py (#8107)
Signed-off-by: zengchuang <zengchuang3@huawei.com>
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2026-09-24 07:36:19 -07:00 |
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98e123f3e0
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[CI/Build][NPU] Add E2E test on Ascend A3 (#7775)
Signed-off-by: DarkMatter9527 <1376576122@qq.com>
Signed-off-by: DarkMatter <1376576122@qq.com>
Co-authored-by: Weiming Liao <fayespica@outlook.com>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
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2026-09-24 14:10:04 +08:00 |
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wangyuandCursor
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3d43571b94
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[CI/Build] Cut L3 entrypoint BAGEL cold starts via L4 small-model sleep suites (#6851) (#7359)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-23 22:06:58 -07:00 |
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db82a55162
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[CI][NPU] Onboard Qwen-Image perf to Ascend A3 nightly (#7970)
Signed-off-by: NumberWan <wantszkin2003@gmail.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
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2026-09-24 04:04:53 +00:00 |
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a473ae78c3
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[Bugfix][HunyuanImage3] Fix DiT LoRA binding: namespace alias + GQA QKV de-interleave (#6802)
Signed-off-by: Asthenia <asthenia0412@gmail.com>
Signed-off-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Asthenia <asthenia0412@gmail.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
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2026-09-23 16:06:54 +00:00 |
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RyanYun09
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732d6085be
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[CI][Omni-DuplexEval] Add nightly scoring CI guard (#7773)
Signed-off-by: RyanYun09 <318555231+RyanYun09@users.noreply.github.com>
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2026-09-23 14:48:10 +00:00 |
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wangyu
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75570ee3a6
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[CI/Build] Move Breeze-TTS-2 voice design e2e to weekly (#8032)
Signed-off-by: wangyu <410167048@qq.com>
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2026-09-23 10:46:23 +08:00 |
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Yueqian Lin
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3f473a358b
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[Model] Accelerate Breeze-TTS-2 non-streaming inference (#7752)
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2026-09-22 17:10:15 -07:00 |
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59db6a4285
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[Rebase] Rebase to vLLM 0.30.0 (#7820)
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Gao Han <hgaoaf@connect.ust.hk>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Gao Han <hgaoaf@connect.ust.hk>
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2026-09-22 15:52:01 +00:00 |
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vOv
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939e6ba56e
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[CI/Build] Give diffusion CPU tests more timeout headroom (#7983)
Signed-off-by: cr-gao <gaochenrui@sjtu.edu.cn>
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2026-09-22 15:47:00 +08:00 |
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wangyu
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0570b0da7e
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[CI][Perf] migrate diffusion DFX benches to vllm bench serve --omni (#7737)
Signed-off-by: wangyu <410167048@qq.com>
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2026-09-21 19:16:39 -07:00 |
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andyluo7
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1586c41ae4
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[CI][ROCm] Shorten the blocking CosyVoice test path (#7748)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-21 18:34:40 -07:00 |
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0z5aand0z5a
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8bc0c38b90
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[Bugfix] Add opt-in MiniCPM-o 4.5 Stage-0 sliding window (#7631)
Signed-off-by: 0z5a <dezhen.lu@student.uni-tuebingen.de>
Signed-off-by: 0z5a <dezhen.lu@uni-tuebingen.de>
Co-authored-by: 0z5a <dezhen.lu@uni-tuebingen.de>
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2026-09-21 18:34:22 -07:00 |
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wangyu
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ef644b6112
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[CI/Build] Promote LingBot-Video dense smoke to ready/merge and wire L4 expansion (#7892)
Signed-off-by: wangyu <410167048@qq.com>
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2026-09-21 07:45:32 -07:00 |
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Sy03
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a9e2117f5e
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[Core][Model] Enable Qwen3-TTS MRV2 and optimize the TTS pipeline (#7781)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-09-20 23:03:08 -07:00 |
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andyluo7
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fa422a3f44
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[CI/Build][ROCm] Cache AMD test images in registry (#7712)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-20 09:51:14 +08:00 |
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Zeng Chuang
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eb2075981d
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[Test][Ascend] Share HunyuanVideo-1.5 E2E across GPU and NPU (#7547)
Signed-off-by: zengchuang <zengchuang3@huawei.com>
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2026-09-18 08:49:08 +00:00 |
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WeiQing Chen
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5d3e6dc1b4
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[Bugfix][MiniMax-H3] Use Hopper-safe modulation precision (#7693)
Signed-off-by: david6666666 <530634352@qq.com>
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2026-09-18 15:16:45 +08:00 |
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1c7476ec19
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[CI/Build][ROCm] Stabilize shared AMD test lanes (#7706)
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: haic0 <haic0@users.noreply.github.com>
Co-authored-by: haic0 <haic0@users.noreply.github.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-18 11:13:07 +08:00 |
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Chenchao Xu
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d0755b5716
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[Model] Add π0.5 (Pi0.5) VLA model support (#6950)
Signed-off-by: chenchaox <chenchaox@nvidia.com>
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2026-09-17 05:18:51 -07:00 |
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psv666
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e3be42e052
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[Core] Give the OpenAI Realtime wire codec a reusable home (RFC #6592 P0a) (#7640)
Signed-off-by: psv666 <2693925048@qq.com>
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2026-09-17 02:33:40 -07:00 |
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chickeytonandClaude Opus 5
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99ff4f3070
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[Core][Frontend] Unified Full-duplex Framework (#7413)
Signed-off-by: chickeyton <ngton2014@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 15:35:36 +08:00 |
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andyluo7
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bbf77cce69
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[CI][ROCm] Add non-blocking entrypoint GPU coverage (#7398)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-16 07:25:56 +08:00 |
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Mengjie ZhaoandCursor
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c17126c219
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[Model] Add Gepard-1.0 OpenAI /v1/audio/speech serving (#7499)
Signed-off-by: Mengjie Zhao <zmj0129@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-15 14:56:51 -07:00 |
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andyluo7
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92715f3f7b
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[CI][ROCm] Add non-blocking engine and model executor GPU coverage (#7397)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-15 13:24:34 +08:00 |
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64903b8e30
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[CI/Build] Share nightly CUDA YAML between H100/L4 and B200 (#7028)
Signed-off-by: wangyu <410167048@qq.com>
Signed-off-by: [Your Name] [Your Email]
Signed-off-by: [Your Name] <your.email@example.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: amy-why-3459 <wuhaiyan17@huawei.com>
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2026-09-14 14:27:10 +08:00 |
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andyluo7
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58adeec05f
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[CI/Build] Add experimental AMD MI300 nightly lane (#6978)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-14 12:02:28 +08:00 |
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Joshna-Medisetty
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6fcab74aa9
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[XPU][Docker] Align XPU image and CI with vLLM v0.29.0 (#7441)
Signed-off-by: Joshna-Medisetty <joshna.medisetty@intel.com>
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2026-09-11 15:54:28 -05:00 |
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wangyu
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627630d7e4
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[BugFix][CI] Restore diff-aware source filtering for post-merge L3 (#7371)
Signed-off-by: wangyu <410167048@qq.com>
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2026-09-10 16:11:27 +00:00 |
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a2486dd00b
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[Core][Diffusion] Add a typed pre-D2H video media contract (#6615)
Signed-off-by: NancyFyong <NancyFyong@users.noreply.github.com>
Signed-off-by: Samit <285365963@qq.com>
Co-authored-by: NancyFyong <NancyFyong@users.noreply.github.com>
Co-authored-by: Samit <285365963@qq.com>
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2026-09-10 09:50:54 +00:00 |
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wangyuandCursor
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5b927b7ceb
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[CI/Build] Diff-aware source_file_dependencies for CUDA/NPU pipelines (#6597)
Signed-off-by: wangyu <410167048@qq.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-10 01:40:01 -07:00 |
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Zhou TaichangandClaude Opus 5
|
aff7d64948
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[Rebase] Rebase to vLLM 0.29.0 (#7230)
Signed-off-by: tzhouam <tzhouam@connect.ust.hk>
Signed-off-by: Zhou Taichang <tzhouam@connect.ust.hk>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-10 12:08:28 +08:00 |
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Sy03
|
333f14e97e
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[Bugfix][MiniCPM-o] Align structured chat content with native omni rendering (#7344)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-09-10 11:38:11 +08:00 |
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Weiming Liaoandwangyu
|
35a83a0885
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[NPU][CI] Add A5 and 310P CI support (#6875)
Signed-off-by: Weiming Liao <liaowm5@gmail.com>
Co-authored-by: wangyu <53896905+yenuo26@users.noreply.github.com>
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2026-09-10 02:16:14 +00:00 |
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Sy03
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b02862beee
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[Model] Optimize MOSS-TTS Local batched execution and streaming codec (#7202)
Signed-off-by: Sy03 <1370724210@qq.com>
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2026-09-09 13:02:12 -07:00 |
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andyluo7andHongsheng Liu
|
c94cf4ddde
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[CI][ROCm] Match CUDA/NPU L2/L3 label routing (#6966)
Signed-off-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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2026-09-09 13:47:15 +00:00 |
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Lei KeandKrystalRay
|
5e4baea64d
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[Bugfix][NPU] Limit MiniMax H3 modulation grid size (#6794)
Signed-off-by: KrystalRay <keeleiray@gmail.com>
Co-authored-by: KrystalRay <keeleiray@gmail.com>
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2026-09-08 09:08:46 -07:00 |
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andyluo7
|
de1b0708bd
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[CI][ROCm] Route LTX2 Ulysses parity to two-GPU lane (#7234)
Signed-off-by: andyluo7 <andy.luo@amd.com>
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2026-09-08 22:59:37 +08:00 |
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Lei KeandKrystalRay
|
7be014bce6
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[Bugfix][NPU] Fix MiniMax-H3 INT8 quantization dispatch (#6876)
Signed-off-by: KrystalRay <keeleiray@gmail.com>
Co-authored-by: KrystalRay <keeleiray@gmail.com>
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2026-09-07 14:50:44 +00:00 |
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