[diffusion][feature] Add component-selective offload policies (#5929)
Signed-off-by: lishunyang12 <lishunyang12@163.com>
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@@ -117,11 +117,12 @@ same time on a host sized for this minimum.
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The consumer-GPU profiles below are HBM budgets only. They still require the
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host-RAM budget above.
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### Single GPU: accuracy and memory first
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### Single GPU: blockwise capacity path
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The single-GPU configuration uses model-level CPU offload.
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This matches the accuracy-qualified reference path and prevents the Qwen3-VL
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encoder and DiT from being resident on the GPU at the same time.
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Use ordinary layerwise offload when one GPU cannot keep the Qwen3-VL encoder
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and DiT resident together. The component list below streams the active DiT,
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the Qwen vision blocks, and the first 50 Qwen text layers. Encoder blocks stay
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rank-local; the video/audio VAEs remain resident.
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```bash
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export MODEL=MiniMaxAI/MiniMax-H3
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@@ -129,20 +130,37 @@ export PORT=8091
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CUDA_VISIBLE_DEVICES=0 \
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VLLM_WORKER_MULTIPROC_METHOD=spawn \
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VLLM_OMNI_VIDEO_SYNC_TIMEOUT=1800 \
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VLLM_OMNI_VIDEO_SYNC_TIMEOUT=14400 \
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vllm serve "${MODEL}" \
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--omni \
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--host 0.0.0.0 \
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--port "${PORT}" \
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--trust-remote-code \
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--task-type fl2va \
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--num-gpus 1 \
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--enable-cpu-offload \
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--diffusion-offload-config \
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'{"mode":"layer","components":["dit","text_encoder"]}' \
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--enforce-eager \
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--diffusion-attention-backend FLASH_ATTN
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```
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Use a GPU with enough memory for the active H3 component and enough system RAM
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for both offloaded DiTs plus the shared components. Model-level offload keeps
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the two DiTs mutually exclusive on GPU, but adds PCIe/NVLink transfer latency.
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This is a capacity profile, not a latency profile: every denoising step streams
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DiT blocks over the host link, while encoder blocks are streamed only during
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the short conditioning phase. It requires host memory for the complete
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checkpoint plus pinned transfer buffers. Re-measure peak HBM on the target
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shape; this command does not claim a particular GPU model as validated.
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A one-B300 correctness smoke selected only `text_encoder` (keeping the DiT and
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VAEs resident) and completed a 384x672, 5-second T2VA request with two denoise
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steps. It installed 77 encoder hooks across the vision and text stacks, used a
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77,728 MiB worker peak, and measured 2.803 seconds encode, 2.706 seconds
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denoise, and 4.503 seconds decode. These reduced-step numbers validate the
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execution path; they are not a quality or production-latency benchmark.
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To use whole-component behavior, change the config to
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`{"mode":"module","components":["dit","text_encoder"]}`. Module
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offload swaps the complete encoder and DiT and therefore has a higher
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encode-phase peak than encoder blockwise offload.
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### Two 24/32 GB GPUs: TP2 distributed layerwise offload
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@@ -483,10 +501,9 @@ Add this option to an existing H3 server command:
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Use the FL2VA-only partition for this capacity test. Loading the combined
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service would also load the Ref2VA DiT and would test a different memory
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budget. A no-offload capacity check should contain none of
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`--enable-cpu-offload`, `--enable-layerwise-offload`, or
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`--enable-distributed-layerwise-offload`. VAE tiling changes decode placement
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but does not offload model weights to the CPU.
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budget. A no-offload capacity check should omit
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`--diffusion-offload-config` and all legacy `--enable-*-offload` aliases. VAE
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tiling changes decode placement but does not offload model weights to the CPU.
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The run passes the capacity check when the server initializes, the request
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finishes without CUDA OOM or Xid errors, `peak_used_mib` remains below the
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@@ -518,10 +535,11 @@ For example, keep the first main block's attention projections in BF16 with:
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```
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The structured option replaces `--quantization fp8`. Online FP8 can be used
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with H3 layerwise offload and with both DLO transfer paths. The default
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AllGather path uses the ordinary loader to finalize FP8 weights and scales
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before sharding them across ranks. `--dlo-no-use-allgather` instead retains
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complete rank-local tensors and avoids the synchronized request-wave contract.
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with H3 layerwise offload and with either DiT DLO transfer. DiT `allgather`
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uses the ordinary loader to finalize FP8 weights and scales before sharding
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them across ranks. DiT `rank-local` instead retains complete loader-produced
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tensors and avoids the synchronized request-wave contract. H3's TP-sharded
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text encoder uses `rank-local`.
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## AMD ROCm (gfx942 / gfx950)
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@@ -567,6 +585,13 @@ vllm serve "${MODEL}" \
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--diffusion-attention-backend FLASH_ATTN
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```
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This validated ROCm capacity recipe intentionally retains the compatibility
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full-topology alias because MiniMax-H3 also stages its VAEs on that path. The
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compact API in this release selects only `dit` and `text_encoder`, so replacing
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the flag would change residency rather than perform a mechanical migration.
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No removal deadline is assigned until the compact API offers equivalent
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component coverage.
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### ROCm four GPUs
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The best-practice CUDA four-GPU configuration works on ROCm with the changes above.
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