[Feature][MiniMax-H3] Fuse the FastH3 four-step adapter at load time (#6714)
Signed-off-by: princepride <wangzhipeng628@gmail.com> Signed-off-by: Hongsheng Liu <liuhongsheng4@huawei.com> Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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@@ -1,5 +1,5 @@
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
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# SPDX-FileCopyrightText: Copyright contributors to the vLLM-Omni project
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import pytest
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from vllm_omni.diffusion.sched import DMD2SigmaSchedule
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@@ -18,7 +18,8 @@ def test_step_count_is_intervals_not_boundaries():
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[
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[],
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[1.0],
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[0.9, 0.5, 0.0],
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[1.5, 0.5, 0.0],
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[0.0, 0.5, 0.0],
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[1.0, 0.5, 0.1],
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[1.0, 0.4, 0.6, 0.0],
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[1.0, 0.5, 0.5, 0.0],
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@@ -31,6 +32,15 @@ def test_malformed_positions_are_rejected(positions):
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DMD2SigmaSchedule.from_positions(positions)
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def test_a_capped_first_position_is_a_schedule_not_a_malformed_one():
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# A DMD2 student trained with max_timestep_ratio < 1 never sees pure noise,
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# so its opening rung sits just below 1.0 (FastH3: 999/1000).
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schedule = DMD2SigmaSchedule.from_positions([0.999, 0.749, 0.5, 0.25, 0.0])
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assert schedule.base_schedule[0] == 0.999
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assert schedule.num_inference_steps == 4
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def test_one_base_schedule_drives_several_shift_scales():
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schedule = DMD2SigmaSchedule.from_positions([1.0, 0.7, 0.4, 0.15, 0.0])
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