[Diffusion][HunyuanImage3] Add request paged prefix caching (#7719)
Signed-off-by: zwhzzz0821 <2831474076@qq.com>
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@@ -8,6 +8,7 @@
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- [High-Level Approach](#high-level-approach)
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- [Example](#example)
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- [What About Multimodal Inputs?](#what-about-multimodal-inputs)
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- [Diffusion KV Prefix Caching](#diffusion-kv-prefix-caching)
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- [Implementation](#implementation)
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- [Related Files](#related-files)
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@@ -25,7 +26,7 @@ vLLM implements automatic prefix caching for managing its kv-cache, which is bes
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- Model / stage specific multimodal data
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!!! note "Note 1"
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This document describes vLLM-Omni's mechanism for caching tensor outputs that are meant to be passed between stages, when requests have common prefixes, similar to the way in which vLLM has prefix caching for the kv-cache. This works in conjunction with vLLM's multimodal encoder caching, but is distinct. See the final section for a concrete example for how they tie together in practice.
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The following sections describe caching tensor outputs passed between AR stages. This is distinct from multimodal encoder caching and from [diffusion KV prefix caching](#diffusion-kv-prefix-caching), which reuses GPU KV pages inside a diffusion stage.
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### High-Level Approach
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@@ -45,7 +46,7 @@ Host footprint: each cached key costs `num_blocks × block_size × D × dtype_by
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### Example
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!!! note "Note 3"
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Prefix caching in vLLM-Omni currently is only supported on AutoRegressive stages with one kv-cache group. Configure it with the pipeline-wide `enable_prefix_caching` field in the deploy config.
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The stage-output tensor cache described here supports AutoRegressive stages with one kv-cache group. Configure it with the pipeline-wide `enable_prefix_caching` field in the deploy config. Diffusion KV caching has the separate requirements below.
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The way in which vLLM-Omni ties into vLLM's prefix caching is best understood by example. Say that we have the following:
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@@ -167,6 +168,65 @@ When we pass our multimodal tensors to the language model component in the same
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Finally, we look up the output hidden states/multimodal tensors corresponding to the prefix cache hit `Block 1` and concatenate it with the forward pass result to get the final result, which is expected to be identical to the full hidden states when prefix caching is disabled.
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### Diffusion KV Prefix Caching
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HunyuanImage3's standalone DiT pipeline can reuse stable text/reference-image KV
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across requests. Enable it on the diffusion stage in the deploy config:
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```yaml
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pipeline: hunyuan_image3_dit
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stages:
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- stage_id: 0
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diffusion_kv_mode: paged_scheduler
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enable_prefix_caching: true
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```
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The Scheduler uses vLLM's native `KVCacheManager` to look up and retain complete
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prefix blocks. The Worker owns the GPU pages and block tables. On a hit, the first
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denoise forward computes only the uncached query suffix while attending to both
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cached and new KV. Dynamic target-image KV is never published as a reusable prefix.
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Cache identity includes token IDs, reference-image content and VAE random state,
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plus model/layout and LoRA context. The same image with different prompts can
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reuse the common leading blocks; it does not imply that every image span or CFG
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branch is interchangeable. Disabling prefix caching skips cache-identity hashing;
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`dense_legacy` remains the default. Enabling prefix caching with a mode other than
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`paged_scheduler`, without a registered model hook, or together with native
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`kv_transfer_config` raises a configuration error.
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Combining it with `enable_sleep_mode: true` is also rejected: sleep discards KV
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pages without invalidating the Scheduler's prefix-cache index. Disable either
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prefix caching or sleep mode.
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The current scope is local DiT reuse, not AR-imported KV or missing-page-only
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cross-stage transfer. Prefix-hit accuracy has been exercised with TP4/SP1 and
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TP2/SP2 (Ulysses), both with EP and CFGP1. Other combinations still require validation. See the
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[diffusion compatibility notes](../../user_guide/diffusion_features.md#diffusion-kv-prefix-caching).
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#### Shared-reference benchmark
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From the repository root, use the unified `vllm bench serve --omni` test runner:
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```bash
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pytest tests/dfx/perf/scripts/run_benchmark.py \
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--test-config-file tests/dfx/perf/tests/test_hunyuan_image3_prefix_caching.json
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```
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Run GPU tests through your environment's GPU scheduler. The suite reuses the
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two-image IT2I accuracy input on a single DiT stage, comparing dense, paged without
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prefix caching, and paged with prefix caching. Each mode runs two ordinary upstream
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warmups followed by eight identical requests at CFG 2.5, 8 denoise steps and seed 42.
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Warmups are excluded from latency and request throughput. This measures full-prefix
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reuse, not the earlier distinct-prompt workload; its results must be reported separately.
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`tests/e2e/accuracy/test_hunyuan_image3_prefix_cache_accuracy.py` uses the same input
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at CFG 2.5, 50 steps and seed 42, comparing all modes against the existing official
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Instruct output image and IT2I thresholds (CLIP ≥90, SSIM ≥0.26, PSNR ≥12.5).
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A different prompt warms the cache; the original prompt then exercises partial
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and repeated hits, with reference-image reuse and query slicing verified.
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Only outputs for the original prompt are scored. The golden comes from AR-to-DiT;
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this single-DiT quality check does not establish identical conditioning between
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the pipelines. The existing AR-to-DiT test remains unchanged.
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### Implementation
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The block/slot model is `vllm_omni/core/prefix_cache/`.
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@@ -32,6 +32,30 @@ Cache methods trade minimal quality for significant speedup. Quality loss is typ
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| **[TeaCache](diffusion/cache_acceleration/teacache.md)** | Adaptive caching using modulated inputs | Quick setup, balanced quality/speed on single GPU |
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| **[Cache-DiT](diffusion/cache_acceleration/cache_dit.md)** | Multiple caching techniques: DBCache, TaylorSeer, SCM | Fine-grained control, tunable quality-speed tradeoff |
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#### Diffusion KV Prefix Caching
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[KV prefix caching](../design/feature/prefix_caching.md#diffusion-kv-prefix-caching)
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reuses stable context KV across requests, rather than approximating denoise
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steps. Enable `diffusion_kv_mode: paged_scheduler` and `enable_prefix_caching: true`
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on the HunyuanImage3 standalone DiT stage. This is separate from the AR stage-output
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cache, TeaCache and Cache-DiT.
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| Model / combination | Scope |
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|---------------------|-------|
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| HunyuanImage3 standalone DiT | Stable text/reference-image prefix reuse; dynamic image tokens are excluded |
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| TP4/SP1 + EP, CFGP1 | Validated reference-image prefix hits |
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| TP2/SP2 (Ulysses) + EP, CFGP1 | Validated reference-image prefix hits; CFG guidance does not require CFG parallelism |
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| Other SP/TP combinations, CFGP>1 | Prefix-hit E2E accuracy not yet validated |
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| AR-imported KV / cross-stage missing-page transfer | Not covered by local prefix caching |
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| Sleep mode | Rejected with prefix caching; discarded KV pages would leave stale cache hits |
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| TeaCache / Cache-DiT, offload, quantization | Not validated with prefix hits |
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| Step execution | Not supported with HunyuanImage3 paged KV; use request-level execution |
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| Other diffusion models | No prefix-cache model adapter yet |
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This table describes prefix-cache scope; the general parallelism tables below do
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not establish prefix-hit compatibility. Floating-point kernel differences still
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require accuracy validation. `dense_legacy` remains the default.
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#### Lossless Acceleration
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Parallelism methods distribute computation across GPUs without quality loss (mathematically equivalent to single-GPU).
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