[MXFP8][XPU] enable mxfp8 using vLLM main repo method (#3782)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
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@@ -7,26 +7,28 @@ using the OCP MX format: groups of 32 K-dimension elements share a single
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`float8_e8m0fnu` exponent scale. This gives better accuracy than channel-wise
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FP8 while keeping the same 8-bit weight footprint.
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This method supports two modes:
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This method supports three modes:
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| Mode | Description |
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|------|-------------|
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| **Online** | BF16 weights are quantized to MXFP8 at load time — no pre-processing needed |
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| **Offline** | msModelSlim-exported MXFP8 weights converted to diffusers format via `merge_mxfp8_checkpoint.py` — weights and scales are loaded directly from the preprocessed checkpoint |
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| **Offline (Native)** | msModelSlim-exported MXFP8 weights converted to diffusers format via `merge_mxfp8_checkpoint.py` — weights and scales are loaded directly from the preprocessed checkpoint |
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| **Offline (AutoRound)** | AutoRound MXFP8 checkpoints with `data_type="mx_fp"` — auto-detected from `config.json` |
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## Hardware Support
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| Device | Support |
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|--------|---------|
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| NVIDIA Blackwell GPU (SM 100+) | ⭕ |
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| NVIDIA Ada/Hopper GPU (SM 89+) | ⭕ |
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| NVIDIA Ampere GPU (SM 80+) | ⭕ |
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| AMD ROCm | ⭕ |
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| Intel XPU | ⭕ |
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| Ascend NPU (Atlas 950 A5) | ✅ |
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| Device | Online | Offline (Native) | Offline (AutoRound) |
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|--------|--------|------------------|---------------------|
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| NVIDIA Blackwell GPU (SM 100+) | ⭕ | ⭕ | ⭕ |
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| NVIDIA Ada/Hopper GPU (SM 89+) | ⭕ | ⭕ | ⭕ |
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| NVIDIA Ampere GPU (SM 80+) | ⭕ | ⭕ | ⭕ |
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| AMD ROCm | ⭕ | ⭕ | ⭕ |
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| Intel XPU | ✅ | ❌ | ✅ |
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| Ascend NPU (Atlas 950 A5) | ✅ | ✅ | ⭕ |
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Legend: `✅` supported, `❌` unsupported, `⭕` not verified in this
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guide.
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Legend: `✅` supported, `❌` unsupported, `⭕` not verified in this guide.
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**Note**: Intel XPU only supports AutoRound MXFP8 for offline mode. Use AutoRound quantized checkpoints or online mode for XPU.
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## Model Type Support
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@@ -82,9 +84,9 @@ python text_to_video.py --model <your-model> --quantization mxfp8
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vllm serve <your-model> --omni --quantization mxfp8
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```
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### Offline Mode
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### Offline Mode (Native)
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Offline mode loads a pre-quantized checkpoint from msModelSlim. A preprocessing
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Native offline mode loads a pre-quantized checkpoint from msModelSlim. A preprocessing
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step converts the raw quantized output to the diffusers format expected by
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vLLM-Omni and injects the quantization config into `transformer/config.json` so
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that vLLM-Omni auto-detects the offline path without a `--quantization` flag.
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@@ -159,10 +161,41 @@ omni = Omni(model="/path/to/Wan2.2-TI2V-5B-MXFP8")
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```
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!!! note
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No `--quantization` flag is needed for offline mode. The preprocessing
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No `--quantization` flag is needed for native offline mode. The preprocessing
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script injects `quantization_config` into each `transformer/config.json`,
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which vLLM-Omni reads automatically to activate the offline MXFP8 method.
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### Offline Mode (AutoRound)
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AutoRound MXFP8 checkpoints declare `quant_method="auto-round"` with `data_type="mx_fp"` in their `config.json`. These are automatically detected and use the `IncMxfp8OfflineLinearMethod` backend.
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To use an AutoRound MXFP8 checkpoint:
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```bash
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python text_to_video.py --model <autoround-mxfp8-model>
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# Online serving
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vllm serve <autoround-mxfp8-model> --omni
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```
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Python API:
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```python
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omni = Omni(model="<autoround-mxfp8-model>")
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```
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!!! note
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AutoRound MXFP8 checkpoints are auto-detected from `config.json` and do not require a `--quantization` flag. The config must include:
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```json
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{
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"quantization_config": {
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"quant_method": "auto-round",
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"data_type": "mx_fp",
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...
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}
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}
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```
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## Parameters
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| Parameter | Type | Default | Description |
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@@ -21,7 +21,7 @@ by msModelSlim and the merge tools.
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| NVIDIA Ada/Hopper GPU (SM 89+) | ✅ | ✅ | ⭕ | ⭕ |
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| NVIDIA Ampere GPU (SM 80+) | ✅ | ✅ | ⭕ | ⭕ |
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| AMD ROCm | ⭕ | ⭕ | ⭕ | ⭕ |
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| Intel XPU | ⭕ | ⭕ | ⭕ | ⭕ |
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| Intel XPU | ⭕ | ⭕ | ✅ | ⭕ |
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| Ascend NPU | ❌ | ✅ | ✅ | ✅ |
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Legend: `✅` supported, `❌` unsupported, `⭕` not verified in this
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@@ -36,7 +36,7 @@ MXFP4 are documented for the Ascend NPU path.
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|--------|-------|----------------|--------|
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| FP8 W8A8 | [FP8](fp8.md) | Qwen-Image; Wan2.2 is not validated | Validated for Qwen-Image family and other DiT models |
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| Int8 W8A8 | [Int8](int8.md) | Qwen-Image; Wan2.2 is not validated | Validated for Qwen-Image and Z-Image |
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| MXFP8 W8A8 | [MXFP8](mxfp8.md) | Wan2.2-T2V-A14B, Wan2.2-I2V-A14B, Wan2.2-TI2V-5B | Ascend NPU only |
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| MXFP8 W8A8 | [MXFP8](mxfp8.md) | Wan2.2-T2V-A14B, Wan2.2-I2V-A14B, Wan2.2-TI2V-5B | Validated on Ascend NPU and Intel XPU |
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| MXFP4 W4A4 | [MXFP4](mxfp4.md) | Wan2.2-T2V-A14B, Wan2.2-I2V-A14B | Ascend NPU only; TI2V-5B is not supported |
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### Multi-Stage Omni/TTS Model (Qwen3-Omni, Qwen3-TTS)
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